Semiconductor Device With Slant Sidewall Channel For High Mobility

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current MOSFET devices face challenges with reduced gate controllability due to short channel effects and poor conductivity of polysilicon gates, limiting output current, operating frequency, and increasing power consumption, especially as gate lengths scale below 32 nm.

Innovation Solution

The semiconductor device features a high-mobility epitaxial channel region with a slant sidewall, formed by epitaxially growing a first semiconductor layer on a semiconductor substrate, surrounded by a second semiconductor layer with source/drain regions, and a gate dielectric and conductor, which enhances channel performance and reduces defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the gate length is reduced to less than 32 nm to increase integration density, then the number of MOSFETs per unit area increases, but the gate controllability on the channel region deteriorates causing short channel effect

Engineering Contradiction:
Improveintegration densityVSAvoidgate controllability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces a dual-gate structure where a second gate is added at the bottom of the channel region, transforming the single-gate control mechanism into a dual-gate control system. This dimensional change in gate configuration enables effective control of the short channel effect while maintaining scaled dimensions, as the bottom gate provides additional electrostatic control over the channel

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If polysilicon is used as gate material to simplify manufacturing, then device fabrication is easier, but poor conductivity causes voltage drop across the gate

Engineering Contradiction:
Improvefabrication simplicityVSAvoidgate conductivity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the material parameter of the gate from polysilicon to metal, which has fundamentally different electrical conductivity properties. This material substitution eliminates the voltage drop issue inherent in polysilicon gates while maintaining compatibility with standard semiconductor manufacturing processes

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If conventional channel materials are used to simplify device structure, then manufacturing is easier, but maximum output current and operating frequency are limited

Engineering Contradiction:
Improvedevice structure simplicityVSAvoidoutput current
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent employs composite material structures in the channel region, combining different semiconductor materials with superior mobility characteristics. This composite approach enables higher output current and operating frequency while maintaining manufacturability through established epitaxial growth and processing techniques

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration increases output current, operating speed, and reduces power consumption by improving channel region quality and maintaining crystal structure integrity, thus overcoming the limitations of conventional channel materials.

Implementation Method 1

epitaxially growing a first semiconductor layer on the semiconductor substrate in the gate opening

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

selectively removing the portion of the second semiconductor layer exposed in the gate opening by wet etching

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS9018739B2Semiconductor device and method of fabricating the same
Publication Date: 2015.04.28 INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD
  • US9018739B2 patent drawing
  • US9018739B2 patent drawing
  • US9018739B2 patent drawing

AI summary

The present application discloses a semiconductor device and a method for manufacturing the same. The semiconductor device comprises a semiconductor substrate; a first semiconductor layer on the semiconductor substrate; a second semiconductor layer surrounding the first semiconductor layer; a high k dielectric layer and a gate conductor formed on the first semiconductor layer; source/drain regions formed in the second semiconductor layer, wherein the second semiconductor layer has a slant sidewall in contact with the first semiconductor layer. The semiconductor device has an increased output current, an increased operating speed, and a reduced power consumption due to the channel region of high mobility.