Slave Clock Synchronization via Hop Count Selection

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Solution Overview

Problem

Conventional Best Master Clock Algorithm (BMCA) in partial timing networks often leads to the selection of suboptimal master devices for synchronization, resulting in desynchronization and inefficiencies among PTP-aware slave devices and master devices, causing poor performance and dysfunction within the network.

Innovation Solution

A method where a slave device in a partial timing network sends request messages with an initial Time-To-Live (TTL) value to multiple candidate master devices, calculates and compares the number of hops to each, and synchronizes its clock with the master device having the lowest number of hops, ensuring optimal synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If conventional BMCA is used to select master devices, then the selection process is simple, but the synchronization accuracy deteriorates

Engineering Contradiction:
Improvemaster device selection processVSAvoidsynchronization accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The slave device performs preliminary actions by sending request messages to multiple candidate master devices before final selection. The slave device receives and processes reply messages containing hop count information, then uses this pre-collected data to make an informed selection, ensuring optimal synchronization accuracy is achieved before actual clock synchronization occurs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback mechanisms where master devices reply to slave device requests with hop count information. The slave device uses this feedback to compare different master devices and select the optimal one, thereby improving synchronization accuracy while maintaining a relatively simple selection process.

Inventive Principle:
Principle #23Feedback

2Speed

If slave devices synchronize with suboptimal master devices, then the synchronization process is faster, but network performance deteriorates

Engineering Contradiction:
Improvesynchronization speedVSAvoidnetwork performance
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The slave device performs preliminary inquiry actions by sending request messages to multiple candidate master devices and receiving reply messages with hop count information before actually initiating synchronization. This preliminary data collection enables the slave device to select the optimal master device, ensuring both fast and accurate synchronization, thereby maintaining high network performance.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If PTP-unaware devices are used in the network path, then device compatibility is improved, but timing precision deteriorates

Engineering Contradiction:
Improvedevice compatibilityVSAvoidtiming precision
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

PTP-unaware devices serve as intermediaries in the network path between PTP-aware slave devices and master devices. These intermediaries forward timing information and request/reply messages without requiring PTP awareness, enabling compatibility with diverse device types while maintaining timing precision through the hop count mechanism that accurately counts network hops regardless of intermediary device capabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11528122B1Apparatus, system, and method for synchronizing slave clocks with optimal master clocks in partial timing networks
Publication Date: 2022.12.13 JUNIPER NETWORKS INC
  • US11528122B1 patent drawing
  • US11528122B1 patent drawing
  • US11528122B1 patent drawing

AI summary

A method may include (1) preparing, at a slave device, a request message that identifies an initial time-to-live value, (2) sending the request message to a plurality of candidate master devices, (3) receiving, at the slave device from one of the candidate master devices, a reply message that identifies a number of hops between the slave device and the one of the candidate master devices, (4) receiving, at the slave device from another one of the candidate master devices, another reply message that identifies another number of hops between the slave device and the another one of the candidate master devices, and then (5) synchronizing a clock of the slave device with a clock of the one of the candidate master devices due at least in part to the number of hops being less than the another number of hops. Various other apparatuses, systems, and methods are also disclosed.