Slave Clock Synchronization Accuracy Estimation

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Solution Overview

Problem

Current communication network synchronization methods lack accurate estimation of time synchronization accuracy at slave nodes due to unaccounted latency unbalances in links and nodes, leading to potential interference and reduced performance in synchronization-sensitive applications.

Innovation Solution

A method that calculates and monitors the synchronization accuracy by obtaining and combining values of link latency unbalance between forward and reverse signaling, allowing for precise estimation and optimization of slave clock synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If intermediate clocks adjust their local clock to match the grandmaster clock frequently or with large adjustments, then synchronization accuracy is improved, but the reliability of timing information passed to downstream clocks deteriorates

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidreliability of timing information
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where intermediate clocks monitor their own synchronization accuracy and the quality of their local clock, then dynamically adjust the reliability indication they report to downstream clocks. This feedback loop allows the system to maintain accurate synchronization while properly communicating the actual reliability status of timing information through the IEEE 1588 Announce message reliability indication field.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the parameter being reported from a static assumption of reliability to a dynamic reliability indication that reflects the actual state of the intermediate clock's local oscillator quality and synchronization performance. This parameter change allows downstream clocks to make informed decisions about the reliability of received timing information.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If synchronization information is signalled through multiple paths with multiple nodes, then network flexibility and redundancy are improved, but time synchronization accuracy deteriorates due to accumulated latency unbalances and timestamping errors

Engineering Contradiction:
Improvenetwork flexibilityVSAvoidtime synchronization accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by having each node in the synchronization path pre-calculate and report its contribution to latency unbalance and synchronization accuracy before the final timing decision is made. This allows the grandmaster clock and intermediate clocks to understand the quality of timing information at each stage, enabling informed selection of synchronization paths and clocks.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces reliability indication as an intermediary parameter that mediates between the grandmaster clock and slave clocks through intermediate clocks. This intermediary information allows the system to maintain multiple paths for flexibility while compensating for accuracy loss by selecting paths with better overall reliability based on the accumulated indications from each intermediate node.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If the standard only presents the accuracy of the original time server, then simplicity of implementation is improved, but the ability to estimate actual slave synchronization accuracy deteriorates

Engineering Contradiction:
Improveimplementation simplicityVSAvoidslave synchronization accuracy estimation
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent segments the overall synchronization accuracy into contributions from individual components: the grandmaster clock accuracy, each intermediate clock's local oscillator quality, and each link's latency unbalance. By segmenting the accuracy measurement and having each node report its contribution, the system maintains relative implementation simplicity while enabling comprehensive accuracy estimation at the slave clock.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3622638B1Methods and devices for synchronization in communication networks
Publication Date: 2023.05.10 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
  • EP3622638B1 patent drawingFigure 1
  • EP3622638B1 patent drawingFigure 2A~4
  • EP3622638B1 patent drawingFigure 3

AI summary

A method for assisting in synchronization of slave clocks in a communication network comprises receiving, in a node (14; 16; 18) of the communication network, a message comprising a representation of a value of a synchronization accuracy (δrec) of a first upstream node (12; 14; 16) in the communication network. A value of an accuracy (δlink) of a link latency unbalance between forward and reverse signalling in a link (21; 22; 23) on which the node ( 14; 16; 18) received the message is obtained. A value of a total synchronization accuracy (δtot) of the node ( 14; 16; 18) comprises at least the accuracy (δlink) of said link latency unbalance of the link (21; 22; 23) on which the node (14; 16; 18) received the message is calculated. A node (14; 16; 18) for assisting in synchronization of slave clocks in a communication network is also presented.