Slave Device Output Timing Calibration via Reference Clock Recovery

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Solution Overview

Problem

Master devices face challenges in selecting the right sampling point for signals from slave devices due to varying roundtrip delays, which are influenced by system structure and temperature, making it difficult to synchronize data transmission effectively.

Innovation Solution

A method where the slave device receives synchronization signal edges from the master device, recovers the reference clock, and adjusts its output timing by comparing sampled values with the master device's sampled data, allowing for independent calibration of output timing to align with the master device's sampling time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the master device uses a fixed sampling point for all slave devices, then the system operation is simple, but data sampling accuracy deteriorates due to varying roundtrip delays

Engineering Contradiction:
Improvesampling accuracyVSAvoidcalibration complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The slave device performs output timing calibration in advance before normal data transmission. The slave device sends calibration signals at predetermined times and adjusts its output timing based on sampled values received from the master device, ensuring accurate sampling without complicating the main data transmission process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The slave device autonomously calibrates its own output timing by comparing its transmitted calibration signals with the sampled values received from the master device. This self-calibration approach eliminates the need for complex master-device coordinated calibration while improving sampling accuracy

Inventive Principle:
Principle #25Self-service

2Measurement precision

If the master device adjusts sampling points for each slave device, then sampling accuracy improves, but the complexity of timing control increases

Engineering Contradiction:
Improvesampling accuracyVSAvoidtiming control ease
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

Instead of having the master device adjust its sampling point for each slave device, the invention inverts the approach by having each slave device adjust its own output timing to match the master device's fixed sampling point. This simplifies the master device's timing control while achieving accurate sampling

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

Each slave device independently calibrates its own output timing characteristics specific to its connection with the master device. This localized calibration approach accounts for individual roundtrip delays without requiring the master device to manage complex timing for each slave

Inventive Principle:
Principle #3Local quality

3Reliability

If the slave device transmits data without timing calibration, then the transmission process is simple, but data collisions occur due to timing misalignment

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidtiming calibration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The slave device performs output timing calibration in advance before normal data transmission begins. By pre-adjusting its output timing based on calibration signal feedback, the slave device ensures reliable data transmission without collisions while keeping the calibration process separate from the main data transmission flow

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3748512B1Method for a slave device for calibrating its output timing, method for a master device for enabling a slave device to calibrate its output timing, master device and slave device
Publication Date: 2023.08.02 INFINEON TECHNOLOGIES AG
  • EP3748512B1 patent drawingFigure 1~2
  • EP3748512B1 patent drawingFigure 3
  • EP3748512B1 patent drawingFigure 4~5

AI summary

A method for a slave device for calibrating an output timing for transmitting data to a master device is provided. The master device and the slave device are communicatively coupled via an interface. The method includes receiving, from the master device, one or more consecutive first signal edges indicating a synchronization event. Further, the method includes recovering a reference clock of the master device based on the one or more consecutive first signal edges. The method includes transmitting one or more predetermined second signal edges to the master device. The one or more predetermined second signal edges are generated by the slave device using the recovered reference clock. Additionally, the method includes receiving, from the master device, data indicating one or more sampled values of the master device for the one or more predetermined second signal edges. The method includes adjusting the output timing based on a comparison of the one or more predetermined second signal edges and the one or more sampled values of the master device for the one or more predetermined second signal edges.