Slave Interface Circuit for Protected Register Write Verification

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current solutions for managing write accesses to safety-relevant registers in processing systems, such as microcontrollers, are inadequate in preventing unintended or erroneous write requests, as they cannot verify whether authorized write requests are generated intentionally or unintentionally.

Innovation Solution

A processing system with a slave interface circuit that manages address sub-ranges and selectively forwards write requests, using configuration data to determine if an address is protected or unprotected, and employing a combinational logic operation to compare the extracted address with the data in the write request to ensure that the protection is only unlocked when specific conditions are met, thereby preventing unintentional unlocking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If write requests are allowed to protected registers without verification, then ease of operation is improved, but reliability deteriorates due to unintended write operations

Engineering Contradiction:
Improvewrite access to registersVSAvoidintegrity of safety-critical data
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

A slave interface circuit is introduced as an intermediary between the communication system and protected registers. This intermediary verifies write requests by comparing the address and data using a combinational logic operation before forwarding to the register, thereby preventing unintended writes while maintaining ease of operation for legitimate accesses.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If verification mechanisms are added to prevent unintended writes, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveprotection against unintended writesVSAvoidslave interface circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The verification function is merged with the existing slave interface circuit that manages address sub-ranges. The combinational logic operation integrates the address-data comparison directly into the address matching logic, avoiding the need for separate verification hardware and minimizing the increase in device complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If all write requests are blocked for protected addresses, then reliability is improved, but productivity deteriorates due to inability to perform legitimate updates

Engineering Contradiction:
Improveprotection of protected registersVSAvoidlegitimate write operations
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The protection mechanism applies different verification rules to different aspects of the write request. The combinational logic operation verifies specific relationships between address and data locally, allowing legitimate writes that satisfy the verification condition while blocking only those that don't, thus maintaining productivity for valid operations.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12117942B2Processing system, related integrated circuit, device and method
Publication Date: 2024.10.15 STMICROELECTRONICS FRANCE
  • US12117942B2 patent drawing
  • US12117942B2 patent drawing
  • US12117942B2 patent drawing

AI summary

A processing system includes a communication system and a processing core configured to generate write requests. A circuit has associated a slave interface circuit configured to manage an address sub-range and selectively forward write requests addressed to a given address. Configuration data specifies whether the given address is protected/unprotected and locked/unlocked. In response to a received write request, address and data are extracted and a determination based on the configuration data is made as to whether the extracted address is protected/unprotected, and locked/unlocked. When the extracted address is unprotected or unlocked, the slave interface forwards the write request. When the extracted address is protected and locked, the slave interface generates an unlock signal in response to a comparison of the extracted address with the extracted data, with the unlock signal being asserted when the extracted data satisfy a predetermined rule with respect to the extracted address.