Slave Processor Control in System-on-Chip via Dynamic Reconfiguration
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Solution Overview
Problem
Current system-on-chip (SoC) technologies face challenges in providing a flexible and efficient platform for developing and managing overlays, particularly in terms of hardware trace and introspection, and controlling slave processors within programmable circuitry.
Innovation Solution
The integration of programmable circuitry within an SoC that includes a processor capable of executing a framework providing high-productivity language control, allowing for the implementation of overlays with trace buffers and the control of slave processors, enabling dynamic modification and management of hardware circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a hardwired processor is used in an SoC, then processing speed and reliability are improved, but flexibility and adaptability deteriorate
Solution Approach 1:
The patent implements a dynamic architecture where the processor can operate in multiple modes: executing software programs for high-level control and implementing hardwired logic circuits for performance-critical functions. This dynamic reconfigurability allows the system to adapt its processing architecture based on operational requirements, combining the reliability of hardwired logic with the flexibility of programmable control.
Solution Approach 2:
The processor is designed to perform multiple functions: it can execute software instructions, implement hardwired logic circuits, and control overlay circuits. This multi-functionality allows a single processor to replace what would traditionally require separate dedicated hardware components, thereby improving both reliability and adaptability simultaneously.
2Adaptability or versatility
If programmable circuitry is used for overlay implementation, then flexibility and adaptability are improved, but device complexity increases
Solution Approach 1:
The patent introduces a specialized intermediary layer between the processor and the programmable overlay circuitry. This intermediary includes control logic and interface mechanisms that simplify the interaction between the hardwired processor and the reconfigurable logic, thereby reducing the overall system complexity while maintaining the flexibility benefits of programmable circuitry.
3Loss of information
If trace buffers are implemented in overlay circuitry, then hardware trace capability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The trace buffer functionality is implemented as a software-managed data structure rather than dedicated hardware circuitry. This copying approach allows the trace buffering function to be realized through software algorithms operating on standard memory elements, thereby achieving comprehensive trace capability without the stringent manufacturing precision requirements that would be necessary for hardware-implemented trace buffers.
Data Source
AI summary
An integrated circuit can include a slave processor configured to execute instructions. The slave processor can be implemented in programmable circuitry of the integrated circuit. The integrated circuit also can include a processor coupled to the slave processor. The processor can be hardwired and configured to control operation of the slave processor.