Flash Memory Storage System Using SLC Buffer for MLC Write Latency
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Solution Overview
Problem
The use of MLC NAND flash memory in storage systems leads to increased response times when writing data from a cache memory, causing delays due to scattered data across multiple physical blocks, which negatively impacts system performance, especially in portable battery-powered devices like SSDs.
Innovation Solution
Incorporating a SLC NAND flash memory with faster writing speeds as a temporary storage area within the flash memory storage system, allowing data from the cache memory to be quickly written to the SLC NAND flash memory, thereby reducing the delay in data transfer and improving overall system performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If MLC NAND flash memory is used as storage medium, then storage capacity is improved, but writing speed deteriorates
Solution Approach 1:
The storage system is segmented into multiple functional components: a cache memory for temporary high-speed storage, an SLC NAND flash memory buffer for rapid data transfer, and an MLC NAND flash memory for long-term storage. This segmentation allows each component to specialize in different performance characteristics, resolving the contradiction between capacity and speed.
Solution Approach 2:
The SLC NAND flash memory buffer acts as an intermediary between the cache memory and the MLC NAND flash memory. It receives data from the cache memory and writes it to the MLC NAND flash memory, utilizing its faster write speed to bridge the performance gap between the slow MLC memory and the fast cache memory.
2Adaptability or versatility
If data is scattered across multiple physical blocks in cache memory, then storage flexibility is improved, but data writing time deteriorates
Solution Approach 1:
The SLC NAND flash memory buffer serves as a mediator that collects scattered data from multiple physical blocks in the cache memory and consolidates it into a single write operation to the MLC NAND flash memory. This intermediary buffer eliminates the time penalty of writing to multiple scattered blocks sequentially.
Solution Approach 2:
The SLC NAND flash memory buffer performs preliminary storage of data received from the cache memory before transferring it to the MLC NAND flash memory. This preliminary action allows the system to acknowledge data receipt quickly while preparing for efficient batch writes to the MLC memory, reducing overall write time.
3Speed
If DRAM cache memory is used to accelerate data access, then reading speed is improved, but data retention reliability deteriorates
Solution Approach 1:
The SLC NAND flash memory buffer acts as an intermediary that receives data from the volatile DRAM cache memory and transfers it to the non-volatile MLC NAND flash memory. This intermediary ensures data is safely stored in non-volatile memory before being fully written to the MLC memory, maintaining reliability while preserving the speed benefits of the DRAM cache.
Solution Approach 2:
The system performs preliminary writing of data from the DRAM cache to the SLC NAND flash buffer before finalizing the write to the MLC NAND flash memory. This preliminary action ensures data is captured and stabilized in a non-volatile intermediate storage, preventing data loss if the system powers off during the write process.
Data Source
AI summary
A flash memory storage system and a data writing method thereof are provided. The flash memory storage system includes a controller, a connector, a cache memory, a SLC NAND flash memory and a MLC NAND flash memory. When the controller receives data to be written into the MLC NAND flash memory from a host system, the data is temporarily stored in the cache memory first and then is written into the MLC NAND flash memory from the cache memory. And, the controller may backup the data stored in the cache memory to the SLC NAND flash memory. Accordingly, it is possible to reduce a response time for a flush command, thereby improving a performance of the flash memory storage system.