Dynamic SLC to MLC Memory Programming Without Erase
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Solution Overview
Problem
Existing memory devices face challenges in efficiently programming memory cells due to limitations in bit density and performance modes, leading to reduced operational efficiency and increased power consumption.
Innovation Solution
A method and apparatus for programming memory devices that dynamically switch between Single-Level Cell (SLC), Multi-Level Cell (MLC), and Quad-Level Cell (QLC) formats without erasing data, allowing for continuous data write operations beyond initial format limits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory cells are programmed to SLC format for high performance, then programming speed is improved, but storage capacity is limited
Solution Approach 1:
The memory device dynamically transitions between SLC and MLC programming modes based on operational requirements. The system begins in SLC mode for high-speed programming, then switches to MLC mode when SLC capacity is reached, allowing continuous operation without performance degradation or data loss
Solution Approach 2:
The memory device is designed to perform multiple functions by supporting both SLC and MLC programming modes within the same memory blocks. This multi-functionality allows the system to adapt between high-performance mode (SLC) and high-capacity mode (MLC) without requiring separate memory devices or erasing existing data
2Quantity of substance
If memory cells are programmed to MLC format for increased capacity, then storage capacity is improved, but programming speed decreases
Solution Approach 1:
The system dynamically adjusts programming mode based on capacity requirements. When SLC capacity is exhausted, the system transitions to MLC mode, providing increased storage capacity while maintaining reasonable programming speeds for bulk data storage operations
3Reliability
If data is erased before re-programming to different format, then programming reliability is improved, but operational efficiency decreases
Solution Approach 1:
The system performs preliminary programming to SLC format, then transitions to MLC format without erasing the data. This preliminary action allows the data to be preserved and reformatted in-place, eliminating the time-consuming erase operation while maintaining programming reliability through controlled format transitions
Solution Approach 2:
The data programming operation continues uninterrupted as the system transitions from SLC to MLC format. The useful action of data storage is maintained continuously without the interruption of an erase cycle, improving operational efficiency while ensuring data integrity through controlled format conversion
4Adaptability or versatility
If multiple programming modes are supported, then adaptability is improved, but device complexity increases
Solution Approach 1:
The control logic dynamically manages programming modes based on simple capacity thresholds. The system monitors SLC capacity and automatically transitions to MLC mode when needed, providing adaptability through dynamic mode switching while keeping control logic complexity manageable through threshold-based decision making
Data Source
AI summary
The memory device includes a plurality of memory blocks, each including a plurality of memory cells arranged in a plurality of word lines. Control circuitry is in communication with the plurality of memory blocks. In operation, the control circuitry receives a data write instruction and programs the memory cells of the memory blocks to a one bit per memory cell (SLC) format. In response to the data programmed to the memory cells of the memory blocks in the SLC format reaching an SLC limit prior to completion of the data write instruction, without erasing the memory cells programmed to the SLC format, the control circuitry programs the memory cells of at least some of the plurality of memory blocks from the SLC format to a two bits per memory cell (MLC) format.