Adaptive SLC-to-MLC Data Transfer in Memory Storage Control
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Solution Overview
Problem
Existing memory systems face inefficiencies in data transfer between single-level and multi-level memory areas, particularly in high-duty cycle environments, leading to poor user experience and increased power consumption due to inflexible flush behaviors and inadequate adaptation to varying storage space conditions.
Innovation Solution
A memory system with a first memory area using single-level mode and a second memory area using multi-level mode, controlled by a memory controller that adjusts data transfer modes based on current storage space and adjustment thresholds, allowing flexible data transfer frequencies and modes to optimize performance and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is transferred frequently from single-level memory area to multi-level memory area, then storage performance is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the data transfer strategy adaptive and adjustable based on real-time storage space conditions. The memory controller dynamically switches between different transfer modes (first transfer mode for high performance, second transfer mode for power saving) depending on the current storage space proportion, resolving the contradiction between performance and power consumption through flexible, context-dependent behavior
Solution Approach 2:
The patent changes the parameter of transfer frequency and transfer mode based on the storage space proportion. When storage space in the single-level memory area is below a threshold, the system switches to more frequent transfers; when above the threshold, it reduces transfer frequency. This parameter adjustment allows the system to optimize the balance between performance and power consumption according to actual storage conditions
2Speed
If data transfer frequency is increased, then read and write performance is improved, but power consumption increases
Solution Approach 1:
The patent changes the transfer frequency parameter based on storage space conditions. By adjusting transfer frequency from high to low depending on whether storage space is below or above the threshold, the system optimizes the trade-off between read/write performance speed and power consumption
Solution Approach 2:
The system implements periodic monitoring of storage space and switches transfer modes based on whether storage space proportion is below or above the threshold. This periodic evaluation and adjustment mechanism allows the system to maintain optimal performance when needed while saving power during normal conditions
Data Source
AI summary
Examples of the present disclosure provide a memory system, electronic apparatus and operating method thereof, host system, and storage medium; wherein the memory system includes: a memory device including a first memory area and a second memory area, the first memory area includes a plurality of first memory cells employing a single-level mode to store data, the second memory area includes a plurality of second memory cells employing a multi-level mode to store data; a memory controller coupled to the memory device and configured to: based on the current storage space of the first memory area and at least one adjustment threshold, transfer data stored in the first memory area to the second memory area according to a preset transfer mode.


