Memory Timing Parameter Bundling for Fast SLC Programming
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory systems face challenges in optimizing timing parameters for both Multi-Level Cell (MLC) and Single-Level Cell (SLC) programming modes, where MLC mode timing parameters may be slower than desired for SLC programming, and existing solutions require separate storage for SLC mode timing parameters, leading to inefficiencies in storage space and interface speed utilization.
Innovation Solution
The proposed solution involves using the same timing parameters for MLC and SLC program modes for a set of sub-clocks to reduce storage space, while allowing for a faster SLC program mode by selecting more aggressive timing parameters, which do not require additional storage for SLC mode parameters, and dynamically switching between SLC program modes based on a single-bit parameter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If separate timing parameters are stored for SLC and MLC programming modes, then programming speed for SLC can be optimized, but storage space requirements increase
Solution Approach 1:
The patent implements a universal timing parameter storage mechanism where a single set of timing parameters serves both SLC and MLC programming modes. The control circuit dynamically selects appropriate timing values from this shared storage based on the operating mode, eliminating the need for separate parameter sets while maintaining optimized performance for both modes.
Solution Approach 2:
The patent utilizes parameter changes by storing multiple timing parameter sets in a single storage location and dynamically selecting among them based on the programming mode. The timing parameters themselves are adjusted (changed) depending on whether SLC or MLC mode is active, allowing optimization for each mode without requiring physically separate storage.
2Quantity of substance
If MLC timing parameters are used for SLC programming, then storage space is reduced, but programming speed decreases
Solution Approach 1:
The patent introduces dynamic selection of timing parameters within the shared storage system. The control circuit actively adjusts which timing parameters are applied based on the current programming mode (SLC or MLC), making the system adaptive rather than static. This dynamic approach allows the system to achieve fast SLC programming speeds while using a unified storage structure.
Solution Approach 2:
The patent prepares multiple timing parameter sets in advance within the single storage location, organized for different programming modes. This preliminary organization allows the control circuit to quickly switch between parameter sets during operation without real-time calculation, enabling both space efficiency and speed optimization.
3Productivity
If aggressive timing parameters are used for faster SLC programming, then interface utilization improves, but timing parameter management complexity increases
Solution Approach 1:
The patent segments the timing parameters into distinct sets organized by programming mode (SLC-specific aggressive timing parameters and MLC timing parameters). This segmentation allows the control circuit to select the appropriate segment based on the active mode, simplifying management despite the presence of multiple parameter sets. The aggressive SLC parameters are contained in a dedicated segment that can be independently managed.
Data Source
AI summary
Technology is disclosed herein for managing timing parameters when programming memory cells. Timing parameters used sub-clocks in an MLC program mode may also be used for those same sub-clocks in a first SLC program mode. However, in a second SLC program mode a different set of timing parameters may be used for that set of sub-clocks. Using the same set of timing parameters for the MLC program mode and the first SLC program mode saves storage space. However, the timing parameters for the MLC program mode may be slower than desired for SLC programming. A different set of timing parameters may be used for the second SLC program mode to provide for faster program operation. Moreover, the different set of timing parameters used for the faster SLC program mode do not require storage of a separate set of timing parameters.