Dynamic SLC TLC Wear Balancing in Memory Storage
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Solution Overview
Problem
In rewritable non-volatile memory modules, the SLC and TLC areas do not simultaneously reach their maximum write capacity at the end of the life cycle, leading to uneven usage and potential write limitations.
Innovation Solution
A valid data merging method that dynamically selects physical erasing units from either the SLC or TLC area based on system parameters, ensuring both areas are utilized optimally by preferring units from the area with lower usage for writing operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If physical erasing units are fixedly allocated to SLC and TLC areas, then the memory module can be manufactured with predetermined capacity distribution, but one area may reach maximum writes before the other at end of life cycle
Solution Approach 1:
The patent implements dynamic allocation of physical erasing units between SLC and TLC areas. The memory control circuit monitors wear levels of both areas and dynamically adjusts which area receives new data writes. When one area approaches its maximum write capacity, the system redirects writes to the other area, ensuring both areas are utilized simultaneously and reaching their limits at the same time, thus extending the overall life cycle of the memory module.
2Productivity
If data is written preferentially to one area, then that area reaches maximum capacity faster, but the other area remains underutilized
Solution Approach 1:
The patent changes the operational parameters of different physical erasing units dynamically. Instead of treating all SLC or all TLC units uniformly, the system monitors individual wear levels and adjusts the selection criteria for data writing. The memory control circuit evaluates parameters such as wear level, available capacity, and write endurance of each area, and selects the optimal target area for each data write operation, thereby balancing utilization across all physical erasing units.
3Quantity of substance
If the memory module is designed to maximize capacity in one area, then that area provides more storage, but the overall life cycle is limited by the smaller area
Solution Approach 1:
The patent makes both SLC and TLC areas serve as interchangeable storage resources for data writes. Rather than assigning fixed functional roles to each area, the system treats them as a unified pool of storage capacity with different characteristics. The memory control circuit intelligently distributes data writes across both areas based on current wear levels, allowing each area to function as needed to extend the overall life cycle while maintaining total storage capacity.
Data Source
AI summary
A valid data merging method, a memory control circuit unit, and a memory storage device are provided. The method includes: obtaining a first system parameter corresponding to a first region and a second system parameter corresponding to a second region; determining whether the first system parameter is greater than the second system parameter; selecting a third physical erasing unit from the second region preferentially and performing a valid data merging operation by using the third physical erasing unit when the first system parameter is greater than the second system parameter; and selecting a fourth physical erasing unit from the first region preferentially and performing the valid data merging operation by using the fourth physical erasing unit when the first system parameter is not greater than the second system parameter.