Sleep Circuit Backup Verification for SRAM Power-Down
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Solution Overview
Problem
The continuous power supply to static random access memory (SRAM) during sleep mode in microcontroller units (MCUs) to prevent data loss increases power consumption and affects user experience.
Innovation Solution
A circuit sleep method involving a processing unit that writes data to a flash memory's data-backup block, performs verification calculations, and powers down the circuit. Upon waking, it checks the data consistency and writes it back to SRAM if consistent, and manages data-backup block usage to prevent excessive erases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the system continuously supplies power to the SRAM during sleep mode to prevent data loss, then the data integrity is maintained, but the power consumption increases
Solution Approach 1:
The patent extracts the data backup function from the SRAM and implements it in the flash memory. The flash memory independently stores backup copies of SRAM data, allowing the SRAM to be completely powered down during sleep mode while maintaining data integrity through the external backup storage.
Solution Approach 2:
The patent introduces an intermediary mechanism consisting of the flash memory and a backup management unit. This intermediary stores and manages backup data, enabling the SRAM to be disconnected from power while providing a data recovery path through verification and restoration processes.
2Use of energy by moving object
If the system uses flash memory for data backup during sleep mode, then the power consumption is reduced, but the complexity of data management increases
Solution Approach 1:
The patent implements feedback through verification values (checksums or CRC) stored alongside backup data. After waking from sleep mode, the system verifies the integrity of backup data before restoration, providing feedback on data validity and enabling automatic error detection and handling.
Solution Approach 2:
The patent performs preliminary actions by pre-calculating and storing verification values with the backup data before entering sleep mode. This preliminary preparation enables rapid verification and restoration processes after waking, reducing the complexity of post-sleep data management.
3Reliability
If the system restores data from flash memory to SRAM after wake-up, then the data integrity is ensured, but the restoration time increases
Solution Approach 1:
The patent applies partial action by only restoring data when necessary (after sleep mode wake-up) and only for the specific data blocks that were backed up. The verification mechanism enables selective restoration, avoiding unnecessary full-memory restoration operations and reducing overall restoration time.
Data Source
AI summary
A circuit sleep method includes: writing all data stored in a memory unit into a current data-backup block and performing a check calculation on the data written into the current data-backup block to obtain a first verification value; powering down the circuit to make the circuit enter a sleep mode; restarting the circuit and determining whether the processing unit has written all the data stored in the memory unit into the current data-backup block before the circuit enters the sleep mode; performing the check calculation on the data stored in the current data-backup block to obtain a second verification value and comparing the first verification value with the second verification value; and writing back the data stored in the current data-backup block to the memory unit in a case that the first verification value and the second verification value are the same.