Slew Rate Control Circuit for LED Dimming
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Solution Overview
Problem
Conventional slew-rate control techniques for load bypass transistors are limited by non-adjustable slew rates, excessive capacitance, and impractical component sizes, leading to voltage or current spikes and potential damage in LED dimming applications.
Innovation Solution
An integrated slew-rate control circuit with a small capacitor that amplifies capacitive effect during large current changes, providing adjustable slew rates and strong charging/discharging currents to counteract leakage, allowing for up to three decades of slew rate magnitude range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a Miller capacitor is added to control voltage slew rate in bypass switching, then voltage slew rate is limited and light intensity fluctuations are reduced, but the capacitor adds excessive capacitance to the control node causing long delays and requires impractically large values for boost converter applications
Solution Approach 1:
A sense transistor is introduced as an intermediary element that couples the control node to the drain node. This sense transistor senses the voltage across the bypass transistor and generates a proportional current that flows through a gain resistor, creating an artificial capacitance effect without requiring a physically large capacitor. The intermediary transfers the voltage information and converts it to a controlling current signal.
Solution Approach 2:
The patent changes the operating parameters of the sense transistor (bias current, transistor dimensions) and the gain resistor value to dynamically adjust the effective capacitance. By modifying these parameters, the circuit achieves variable slew rate control without changing the physical capacitor size, thereby avoiding the delays associated with large fixed capacitance values.
2Ease of manufacture
If a fixed current is used to charge/discharge the bypass transistor gate, then the circuit is simple, but the slew rate is not adjustable and leakage currents can overwhelm the charging current
Solution Approach 1:
The circuit implements feedback by using the sense transistor to continuously monitor the voltage across the bypass transistor and adjust the gate charging current accordingly. The current through the gain resistor is proportional to the instantaneous voltage across the bypass device, creating a feedback loop that automatically adjusts the slew rate based on operating conditions and overcomes leakage currents.
Solution Approach 2:
The patent transforms the static fixed current charging approach into a dynamic system where the charging current varies with the operating conditions. The effective capacitance and charging current are dynamically adjusted based on the voltage across the bypass transistor, allowing the circuit to adapt to different operating points and maintain optimal slew rate control throughout the switching transition.
3Reliability
If an acceptable Miller capacitance is used for boost converter slew-rate control, then adequate slew-rate control is achieved, but the capacitor size becomes impractical for on-chip integration or the charging current becomes impractically small
Solution Approach 1:
The patent uses parameter changes in the sense transistor (bias current, transistor width-to-length ratio) and gain resistor to create an effective capacitance that is much larger than any physical capacitor that could be integrated. By adjusting these parameters, the circuit achieves the equivalent effect of a large capacitor without the physical size, making it suitable for on-chip integration in boost converter applications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables effective voltage slew-rate control across bypass transistors, reducing light intensity fluctuations and preventing damage, while being compact enough for on-chip integration and adaptable to various DC/DC converter power stages.
Implementation Method 1
As the bypass transistor is enabled or disabled, a slew-rate control capacitor coupled between a conduction node of the bypass transistor and a control node of the bypass transistor is charged or discharged
Implementation Method 2
the current of the slew-rate control capacitor can be scaled using a current mirror, and the current mirror can dump current to the control node of the bypass transistor
Data Source
AI summary
Techniques for an integrated slew-rate control circuit are provided. In certain examples, an adjustable, integrated slew-rate control circuit for a bypass transistor can provide three decades of adjustability. In an example, a slew-rate control circuit can include a load bypass transistor, a slew-rate control capacitor, electrically coupled between a conduction node of the load bypass transistor and a control node of the load bypass transistor, and a current mirror circuit. The current mirror circuit can include a sense transistor electrically coupled in series with the slew-rate control capacitor and the control node, and a mirror transistor electrically coupled between a power supply and the control node, to selectively provide, to or from the control node, a shunt current that bypasses the slew-rate control capacitor to limit a slew rate of a voltage at the conduction node.