Power Supply Slew Rate Detector for Flash Memory Reliability
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Solution Overview
Problem
Legacy power supply circuits in flash memories often have unknown behavior, leading to potential forbidden operation modes and compromised memory operation and reliability when reused, especially due to unclear power sequencing requirements across multiple domains.
Innovation Solution
A power supply slew rate detector is developed, incorporating an RC filter and Schmitt trigger circuitry with voltage divider elements to identify and read power supply slew rates during ramp-up, allowing for digital addressing and reducing PVT sensitivity, thereby ensuring proper operation and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If legacy power supply circuits are reused in flash memory designs, then circuit development time is reduced through reuse of existing blocks, but reliability deteriorates due to unknown behavior and forbidden operation modes
Solution Approach 1:
The patent applies preliminary action by implementing a slew rate detector circuit that proactively monitors power supply voltage transitions before they can cause harmful effects. The detector continuously checks whether the power supply meets minimum slew rate requirements during voltage ramp-up, preventing forbidden operation modes from occurring in the first place, thus maintaining both reuse benefits and reliability
Solution Approach 2:
The patent implements feedback through the slew rate detector that monitors power supply voltage transitions and provides diagnostic information about whether minimum slew rate requirements are met. This feedback mechanism allows the system to detect and report potential reliability issues with reused power supply circuits, enabling designers to identify and correct problems while still benefiting from circuit reuse
2Device complexity
If reusable power supply blocks are used without complete documentation, then circuit complexity is reduced through standardization, but measurement precision deteriorates because slew rate behavior cannot be verified
Solution Approach 1:
The patent applies self-service by making the slew rate detector internally self-calibrating using on-chip reference circuits. The detector uses integrated voltage references and timing circuits to automatically generate accurate slew rate measurements without requiring external calibration equipment or complex test setups, thus maintaining low device complexity while achieving high measurement precision
Solution Approach 2:
The patent replaces mechanical or external measurement systems with an integrated electronic slew rate detector that uses voltage dividers, current mirrors, and timing circuits to electronically measure power supply slew rates. This substitution of electronic measurement mechanisms enables precise slew rate verification while keeping the overall device complexity low through integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively identifies and manages power supply slew rates, preventing forbidden operation modes and ensuring reliable memory operation by providing diagnostic capabilities within the power supply slew rate detector, which can be read digitally, thus enhancing the reliability of flash memory systems.
Implementation Method 1
the filter circuit may include a capacitor and a resistor. The capacitor may be coupled to the power supply output and the resistor may be coupled to the capacitor and to ground
Implementation Method 2
A Schmitt trigger may have an input coupled to a node between the capacitor and the resistor and an output configured to indicate a slew rate of the power supply output
Data Source
AI summary
In some embodiments, a power supply slew rate detector may include a filter circuit having a capacitive element operably coupled to a power supply output provided to a flash memory circuit and a resistive element operably coupled to the capacitive element and to ground, and a Schmitt trigger including an input operably coupled to a node between the capacitive element and the resistive element, the Schmitt trigger further including an output configured to indicate a slew rate of the power supply output.


