Adjustable Slew-Rate Interface Circuit for High-Speed Low-EMI Links
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Solution Overview
Problem
Existing interface circuits face challenges in achieving high-speed data transmission while minimizing electromagnetic interference (EMI) affecting other integrated circuit chips, particularly as data capacity increases and diverse communication standards are adopted in electronic devices.
Innovation Solution
The interface circuit design includes a series connection of first and second switching devices with capacitors and resistors, controlled by input signals to adjust the slew rate of output signals, allowing for high-speed data transmission and reduced EMI by charging and discharging capacitors to manage signal transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high-speed data transmission is implemented, then data communication speed is improved, but electromagnetic interference affecting other integrated circuit chips increases
Solution Approach 1:
The patent applies dynamics by making the slew rate of the output signal adjustable rather than fixed. The interface circuit can dynamically change the slew rate based on operational requirements, allowing high-speed transmission when needed while reducing EMI when high speed is not required. This is achieved through controllable switching devices that can adjust the rate of change of the output signal voltage.
Solution Approach 2:
The patent changes the parameter of slew rate (the rate of change of output signal voltage) to resolve the contradiction. By adjusting this parameter, the circuit can operate at different speeds with corresponding EMI levels. The ability to modify this physical parameter allows optimization of both data transmission speed and EMI reduction depending on the operational context.
2Productivity
If slew rate of output signal is increased for high-speed communication, then data transmission performance is improved, but interference with RF and GPS modules increases
Solution Approach 1:
The interface circuit dynamically adjusts the slew rate based on the operational mode. When high-speed data communication is required, the slew rate is increased to improve productivity. When RF or GPS modules are operating, the slew rate is reduced to minimize interference. This dynamic adaptation allows the system to optimize data communication efficiency while protecting other sensitive components.
Solution Approach 2:
The circuit employs periodic control of the switching devices to manage the slew rate. By periodically adjusting the switching timing and duration, the circuit can create controlled signal transitions that achieve high-speed communication during appropriate intervals while reducing interference during intervals when RF or GPS modules are active.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables efficient high-speed data communication with reduced electromagnetic interference, improving the operational performance of electronic devices by minimizing interference with other components, such as RF and GPS modules.
Implementation Method 1
a first capacitor connected to a node between the first resistor and the first switching device, and a second capacitor connected to a node between the second resistor and the second switching device
Implementation Method 2
a first switching device connected to a first power supply node supplying a first power supply voltage, and controlled by a first input signal, a second switching device connected to a second power supply node, supplying a second power supply voltage that is lower than the first power supply voltage, and controlled by a second input signal
Data Source
AI summary
An interface circuit is provided and includes a first switching device connected to a first power supply node supplying a first voltage, and controlled by a first input signal, a second switching device connected to a second power supply node supplying a second voltage lower than the first voltage, and controlled by a second input signal different from the first input signal, an output node through which the first switching device and the second switching device are connected to each other in series, outputting an output signal, a first resistor connected between the first power supply node and the first switching device, a second resistor connected between the second power supply node and the second switching device, a first capacitor connected to a node between the first resistor and the first switching device, and a second capacitor connected to a node between the second resistor and the second switching device.


