Slice-Based Memory Layout for Voltage Drift Compensation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Memory devices experience voltage level drift over time, leading to inefficiencies and inaccuracies in data storage and retrieval, particularly in non-volatile memory systems.

Innovation Solution

Implementing content addressable memory (CAM) and hash tables to manage drift by maintaining records of previous access commands, along with scheduling policies and FIFO buffers to ensure delayed execution of commands, thereby compensating for voltage level changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If voltage levels are monitored continuously to detect drift, then measurement precision improves, but use of energy increases

Engineering Contradiction:
Improvevoltage level detection accuracyVSAvoidenergy consumption for monitoring
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The system performs voltage drift detection at periodic intervals rather than continuously, using the drift detection module to sample voltage levels at scheduled times. This periodic monitoring approach maintains measurement precision for detecting voltage drift while significantly reducing energy consumption compared to continuous monitoring.

Inventive Principle:
Principle #19Periodic action

2Reliability

If access commands are delayed using FIFO buffers, then reliability improves by compensating for voltage drift, but loss of time increases

Engineering Contradiction:
Improvedata access accuracyVSAvoidcommand execution delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system uses FIFO buffers to preliminarily queue access commands before voltage drift occurs or is detected. By preparing and organizing commands in advance with proper timing, the system can delay execution until voltage levels are favorable without losing data, thus improving reliability while minimizing time loss through efficient buffer management.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The FIFO buffer acts as a cushion that absorbs the timing variations caused by voltage drift. Commands are stored in the buffer with sufficient time margin, providing a cushion against voltage fluctuations. This allows the system to wait for optimal voltage conditions without causing critical time loss, as the buffer absorbs the delay.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Measurement precision

If CAM and hash tables are used to manage drift records, then measurement precision improves, but device complexity increases

Engineering Contradiction:
Improvevoltage drift tracking accuracyVSAvoidmemory management structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system segments the drift management function into two distinct components: a CAM for storing precise voltage drift measurements and a hash table for efficient command routing. This segmentation allows each component to be optimized for its specific function, maintaining measurement precision while organizing complexity into manageable, specialized modules rather than a monolithic structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The hash table serves as an intermediary between the CAM storage structure and the command execution system. It translates logical addresses to physical addresses in the CAM, enabling efficient access to drift records without requiring the command execution logic to directly manage the complex CAM structure. This intermediary simplifies the overall system architecture while preserving measurement precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12517652B2Memory management
Publication Date: 2026.01.06 MICRON TECHNOLOGY INC
  • US12517652B2 patent drawing
  • US12517652B2 patent drawing
  • US12517652B2 patent drawing

AI summary

Managed units (MUs) of data can be stored on a memory device according to a slice-based layout. A slice of the slice-based layout can include a plurality of stripes, each of the stripes including respective partitions and respective MUs of data. A subset of the stripes each include a quantity of partitions and a first quantity of MUs of data. Another subset of the stripes each include a lesser quantity of partitions and a lesser quantity of MUs of data.