Multi-Tap Decision Feed-Forward Equalizer Using Slicer Outputs
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Solution Overview
Problem
Traditional SerDes architectures face limitations in coupling between clock data recovery (CDR) and equalization adaptation, leading to sub-optimal CDR locking points, sensitivity to transmitter settings, and increased complexity due to the dominance of Feedforward Equalizers (FFE) in noise and crosstalk correction, while Decision Feedback Equalizers (DFE) are limited to postcursor ISI correction and suffer from error propagation.
Innovation Solution
A digital signal processing (DSP) SerDes receiver architecture integrating a Decision Feedforward Equalizer (DFFE) with joint auto-adaptation for optimal signal shaping, decoupling CDR and equalization adaptations, and utilizing a multi-tap DFFE for both precursor and postcursor ISI correction to achieve symmetric pulse responses and improved bit-error-rate (BER) performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Feedforward Equalizer (FFE) is used for both precursor and postcursor ISI correction, then ISI correction capability is improved, but noise and crosstalk amplification increases
Solution Approach 1:
The patent divides the equalization function into two separate components: FFE for precursor ISI correction and DFE for postcursor ISI correction. This segmentation allows each equalizer type to operate in its optimal performance range, with FFE handling precursor interference without excessive noise amplification and DFE handling postcursor interference without error propagation, thereby resolving the contradiction between comprehensive ISI correction and noise/crosstalk amplification
Solution Approach 2:
The patent creates a hybrid equalizer architecture that combines the capabilities of both FFE and DFE into a single unified system. This multi-functional equalizer can simultaneously correct both precursor and postcursor ISI while leveraging the strengths of each equalizer type, achieving comprehensive ISI correction without the detrimental effects of using either equalizer type alone
2Object-affected harmful factors
If Decision Feedback Equalizer (DFE) is used for postcursor ISI correction, then noise amplification is avoided, but precursor ISI correction capability is lost
Solution Approach 1:
The patent assigns specific functional segments to each equalizer type: DFE is dedicated to postcursor ISI correction where it excels at avoiding noise amplification, while FFE is dedicated to precursor ISI correction where it can effectively compensate for earlier symbol interference. This functional segmentation ensures that noise amplification is avoided in the DFE path while precursor ISI correction capability is maintained through the FFE path
Solution Approach 2:
The hybrid equalizer architecture provides universal ISI correction capability by integrating both FFE and DFE functions. The system can simultaneously correct both precursor and postcursor ISI, making it universally applicable to all ISI scenarios without sacrificing the noise-avoidance advantage of DFE or the precursor correction advantage of FFE
3Reliability
If multiple taps of FFE are used for ISI correction, then both precursor and postcursor ISI can be corrected, but device complexity increases
Solution Approach 1:
The patent segments the equalization taps into two distinct groups: FFE taps for precursor ISI correction and DFE taps for postcursor ISI correction. This segmentation allows the system to achieve comprehensive ISI correction with a more manageable complexity distribution, as DFE taps can be implemented with simpler logic compared to equivalent FFE taps, thereby reducing overall device complexity while maintaining full ISI correction capability
Data Source
AI summary
A multi-tap Differential Feedforward Equalizer (DFFE) configuration with both precursor and postcursor taps is provided. The DFFE has reduced noise and/or crosstalk characteristics when compared to a Feedforward Equalizer (FFE) since DFFE uses decision outputs of slicers as inputs to a finite impulse response (FIR) unlike FFE which uses actual analog signal inputs. The digital outputs of the tentative decision slicers are multiplied with tap coefficients to reduce noise. Further, since digital outputs are used as the multiplier inputs, the multipliers effectively work as adders which are less complex to implement. The decisions at the outputs of the tentative decision slicers are tentative and are used in a FIR filter to equalize the signal; the equalized signal may be provided as input to the next stage slicers. The bit-error-rate (BER) of the final stage decisions are lower or better than the BER of the previous stage tentative decisions.


