Sliding IF Transceiver Architecture Using Single LO
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Solution Overview
Problem
Current transceiver architectures face challenges in reducing power consumption and complexity due to the need for separate TX and RX local oscillators, which increases power and die area consumption, and struggles with accommodating variable intermediate frequencies.
Innovation Solution
A transceiver design that uses a single frequency synthesizer to generate local oscillator signals for both transmit and receive paths, allowing for a 'sliding' intermediate frequency, which is processed using discrete-time analog filters and charge samplers to remove interference, thereby reducing power consumption and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate TX and RX LO's are employed in zero-IF transceiver architectures, then the TX and RX carrier frequencies can be different as per communications system design, but the power consumption and die area consumption increase due to the need to provide multiple phase-locked loops
Solution Approach 1:
The patent merges the TX and RX LO generation functions into a single shared PLL architecture. The frequency synthesizer generates a common LO signal that is distributed to both TX and RX paths, eliminating the need for separate PLL circuits. This combining approach directly reduces power consumption and die area while maintaining the capability to support different TX and RX carrier frequencies through frequency translation in the mixing stages.
Solution Approach 2:
The single LO signal generated by the shared PLL serves multiple functions: it is used for both TX up-conversion and RX down-conversion operations. The LO signal is distributed to multiple mixers in both transmit and receive paths, allowing one oscillation source to perform the work of multiple oscillators. This multi-functional approach eliminates redundant circuitry while preserving system functionality.
2Adaptability or versatility
If separate TX and RX LO's are employed in zero-IF transceiver architectures, then the TX and RX carrier frequencies can be different as per communications system design, but the die area consumption increases due to the need to provide multiple phase-locked loops
Solution Approach 1:
The patent merges the TX and RX LO generation functions into a single shared PLL architecture. The frequency synthesizer generates a common LO signal that is distributed to both TX and RX paths, eliminating the need for separate PLL circuits. This combining approach directly reduces power consumption and die area while maintaining the capability to support different TX and RX carrier frequencies through frequency translation in the mixing stages.
Solution Approach 2:
The single LO signal generated by the shared PLL serves multiple functions: it is used for both TX up-conversion and RX down-conversion operations. The LO signal is distributed to multiple mixers in both transmit and receive paths, allowing one oscillation source to perform the work of multiple oscillators. This multi-functional approach eliminates redundant circuitry while preserving system functionality.
3Use of energy by stationary object
If a single LO is provided for both TX and RX portions of a transceiver, then power consumption and complexity are reduced, but the resultant intermediate frequency of the RX signal would be variable depending on the particular communication system design
Solution Approach 1:
The patent embraces the variable intermediate frequency characteristic by designing dynamic and reconfigurable filtering stages. The band-pass filters and sampling circuits are configured to operate across a range of IF frequencies rather than being fixed to a single frequency. This dynamic approach allows the receiver to adapt to different communication system designs while maintaining a single LO architecture, turning the previously problematic variability into a flexible feature.
Solution Approach 2:
The patent utilizes reconfigurable filtering parameters and sampling rates that can be adjusted according to the specific IF frequency required by different communication systems. By making the filter characteristics and sampling parameters changeable rather than fixed, the system can accommodate variable intermediate frequencies while maintaining optimal performance across different operating conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and die area while improving transceiver performance by allowing for variable intermediate frequencies and efficient signal processing, enhancing the overall efficiency and flexibility of the transceiver design.
Implementation Method 1
The RX portion of the transceiver may include down-conversion mixers for mixing an RX signal with an RX LO, which shifts the spectrum of the RX signal down in frequency for further processing
Implementation Method 2
interference removal may be performed on the sliding-IF RX signal using, e.g., discrete-time analog filters
Implementation Method 3
charge samplers to remove interference
Data Source
AI summary
Techniques for providing a transceiver with a sliding intermediate frequency (IF). In an aspect, a PLL generates a single local oscillator (LO) signal used for both up-conversion by a transmit (TX) signal path and down-conversion by a receive (RX) signal path, wherein the LO frequency is chosen as the TX carrier frequency. As the TX and RX carrier frequencies may generally differ by a variable amount, the RX signal path utilizing the (TX) LO frequency for down-conversion may be characterized as having a “sliding” IF. To accommodate the sliding IF receiver architecture, specific processing functions such as charge sampling, discrete-time analog band-pass filtering, and sub-sampling analog-to-digital conversion (ADC) are described.