Sliding Time Window for Parallel Processor Core Simulation
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Solution Overview
Problem
Existing virtual platform simulations, such as SystemC-based simulations, are inherently sequential, which reduces performance on parallel hardware platforms like symmetric multiprocessing systems, as they are not easily parallelizable and require significant engineering effort to become thread-safe and re-entrant, limiting the efficiency of processor core models in simulations.
Innovation Solution
The method involves executing processor core models in parallel within a sliding time window, with each model in a separate OS thread, and using a separate ROTS OS thread for the simulation kernel and hardware models, allowing the sliding time window to advance based on local core times and scheduled events, enabling concurrent simulation of multiple processor core models.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional sequential SystemC simulation is used, then thread-safety requirements are simplified, but simulation performance deteriorates on parallel hardware platforms
Solution Approach 1:
The simulation system is segmented into multiple independent execution threads, each handling specific processor core models. The sequential SystemC simulation is divided into parallel execution units that can run simultaneously on multi-core hardware platforms, improving simulation performance while maintaining thread-safety through proper segmentation of simulation state
Solution Approach 2:
The patent transitions from single-dimensional sequential execution to multi-dimensional parallel execution by introducing temporal decoupling with sliding time windows. This allows processor core models to execute ahead of global simulation time within defined windows, creating a new dimension of parallelism that leverages hardware capabilities without requiring full thread-safety re-engineering
2Speed
If processor core models execute ahead of global simulation time, then simulation speed improves, but synchronization complexity increases
Solution Approach 1:
The patent implements dynamic sliding time windows that adjust their position and size based on simulation progress and event scheduling. The time window boundaries are not fixed but dynamically adapted to maintain synchronization between parallel processor core executions and the global simulation timeline, allowing speed improvement without unmanageable synchronization complexity
Solution Approach 2:
The system uses feedback mechanisms where the simulation kernel monitors execution progress of processor core models within sliding time windows and adjusts window parameters accordingly. Events scheduled in the ROTS thread provide feedback that triggers synchronization points, ensuring that temporal decoupling does not lead to loss of simulation accuracy or excessive synchronization overhead
Data Source
AI summary
Embodiments of the present disclosure support a simulation of a plurality of processor core models. The processor core models are executed in parallel within a sliding time window of a defined size. Each processor core model is executed in a different corresponding thread and advances a local core time within the sliding time window. The sliding time window advances by updating a start time of the sliding time window based on the local core time of each processor core model. One or more hardware models and a simulation kernel are executed in a separate thread having a simulation time and simulation events. The start time of the sliding time window is updated based further on an event time of a next event of the simulation events scheduled in the separate thread.


