Sliding Window Parallelization for Multi-Core Elephant Flows
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Solution Overview
Problem
Multi-core computing environments face challenges in efficiently processing elephant flows due to single-threaded limitations, synchronization primitives that introduce latency and overhead, and scalability issues with increasing hardware resources, particularly in high-throughput network deployments like 5G and 6G.
Innovation Solution
Implementing lockless parallelization of sequence number generation for sliding window protocols, partitioning incoming packet flows into finer-granularity sub-flows, and managing these sub-flows independently without synchronization primitives, utilizing multi-core processor circuitry like IPUs and smart NICs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If single-threaded processing is used for elephant flows, then implementation is simple, but processing throughput is limited
Solution Approach 1:
The patent divides a single elephant flow into multiple sub-flows, each processed by a separate processing thread. This segmentation allows parallel processing of packet sequences, thereby increasing overall throughput while maintaining manageable complexity through structured flow division and independent sequence number spaces for each sub-flow.
2Reliability
If synchronization primitives are used for multi-threaded processing, then coordination is achieved, but latency and overhead increase
Solution Approach 1:
The patent extracts the sequence number management function from the main data processing path and implements it independently for each sub-flow. By giving each processing thread its own sequence number space and managing sequence numbers independently without shared state, the patent eliminates the need for synchronization primitives like locks and semaphores, thereby removing the associated latency and overhead while maintaining coordination reliability.
3Productivity
If hardware resources are increased, then processing capacity should improve, but scalability is limited by single-threaded architecture
Solution Approach 1:
The patent implements a dynamic multi-threaded architecture where the number of processing threads can be adjusted based on available hardware resources and flow characteristics. Each thread independently processes sub-flows with dedicated sequence number spaces, allowing the system to scale efficiently by adding more threads and corresponding hardware resources without being constrained by single-threaded architectural limitations.
Data Source
AI summary
Methods, apparatus, and articles of manufacture have been disclosed for performance scaling with parallel processing of sliding window management on multi-core architecture. An example apparatus includes at least one memory, instructions in the apparatus, and processor circuitry to at least one of execute or instantiate the instructions to partition a packet flow into two or more sub flows based on a packet flow distribution configuration, the two or more sub flows associated respectively with two or more sliding windows that are able to slide in parallel, provide the two or more sub flows to a buffer to schedule distribution of the two or more sub flows, dequeue the two or more sub flows from the buffer to one or more hardware cores, and transmit the two or more sub flows to a destination device.