Slit Recess Channel Gate Alignment via Tapered Spacer
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Solution Overview
Problem
The misalignment between the recess gate and the gate conductor in recessed-gate MOS transistors affects the yield of integrated circuit devices, particularly due to the complexities in the lithographic and etching processes involved in forming these structures.
Innovation Solution
A slit recess gate structure is formed with a substrate having a first trench filled with a gate dielectric and conductive layers, where a second trench is aligned with the first trench, and a spacer with a tapered structure is used to ensure precise alignment of the second conductive layer with the first conductive layer, along with a method that includes forming a second conductive layer with a smaller bottom surface area than its top surface area to facilitate alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a first lithographic and etching process is performed to etch a gate trench into the semiconductor substrate, then the gate trench is formed, but misalignment between the gate conductor and the recess gate occurs easily, affecting device yield
Solution Approach 1:
A spacer layer is introduced as an intermediary element between the first conductive layer (recess gate) and the second conductive layer (gate conductor). The spacer is formed on the sidewall of the second trench and provides a physical reference that guides the alignment of the second conductive layer, thereby eliminating the need for complex lithographic alignment between the two conductive layers while improving alignment precision
Solution Approach 2:
The gate structure is segmented into distinct functional layers: the first conductive layer forming the recess gate, the spacer layer providing alignment reference, and the second conductive layer forming the gate conductor. This segmentation allows each layer to be formed independently with its own optimization, reducing the cumulative alignment errors that would occur in a monolithic structure
2Manufacturing precision
If the bottom surface area of the second conductive layer is made smaller than the top surface area, then alignment with the first conductive layer is improved, but the gate conductor geometry becomes more complex
Solution Approach 1:
The second conductive layer is formed with a tapered geometry where the bottom surface area is smaller than the top surface area. This curved/tapered shape allows the gate conductor to be self-aligned with the first conductive layer through the spacer reference, while the gradual transition in cross-section minimizes the impact on electrical performance and simplifies the fabrication process compared to sharp geometric features
Data Source
AI summary
A slit recess channel gate is provided. The slit recess channel gate includes a substrate, a gate dielectric layer, a first conductive layer and a second conductive layer. The substrate has a first trench. The gate dielectric layer is disposed on a surface of the first trench and the first conductive layer is embedded in the first trench. The second conductive layer is disposed on the first conductive layer and aligned with the first conductive layer above the main surface, wherein a bottom surface area of the second conductive layer is substantially smaller than a top surface area of the second conductive layer.