Slit Stress Modulation in 3D Stacked Semiconductor Substrates
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Solution Overview
Problem
In semiconductor manufacturing, 3D stacked ICs face challenges with slit structures that are difficult to fill properly, leading to air gaps, voids, and subsequent defects such as shorts and warpage, which increase failure rates and reduce yield.
Innovation Solution
A hybrid slit fill approach using a combination of Chemical Vapor Deposition (CVD) High Aspect Ratio Process (HARP) and Spin-On-Dielectric (SOD) materials to fill slit structures, controlling parameters like material thickness, densification temperature, and time to form a solid, non-conductive structure and manage stress across the wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional single-material fill processes are used, then the process is simple, but air gaps and voids form in slit structures
Solution Approach 1:
The fill process is divided into two distinct stages: first applying a conformal layer that adheres to slit walls, then filling the remaining space with a different material. This segmentation allows each material to perform its specific function optimally - the first material provides structural support and stress control, while the second material completes the fill without forming voids.
Solution Approach 2:
The invention uses a composite fill approach combining two different materials with complementary properties. The first material (e.g., spin-on-glass or CMP-processed dielectric) provides adhesion and stress management, while the second material (e.g., CVD-dielectric or tungsten) provides complete space filling. This composite approach eliminates the air gaps that occur with single-material fills.
2Reliability
If slit structures are not properly filled, then manufacturing is easier, but defects such as shorts and warpage increase
Solution Approach 1:
The first fill material is applied in advance to coat the slit walls and establish proper adhesion and stress characteristics before the second fill material is introduced. This preliminary action prevents defects by ensuring the slit structure is properly prepared to receive and retain the final fill material, eliminating the need for complex post-processing repairs.
Solution Approach 2:
The invention controls various parameters including material thickness, deposition conditions, and densification temperatures to optimize the fill process. By adjusting these parameters, the process achieves complete filling without voids while maintaining manageable process complexity through controlled variable optimization.
3Reliability
If material thickness is increased to prevent voids, then fill completeness improves, but stress control becomes difficult
Solution Approach 1:
Different regions of the slit structure receive different materials with different mechanical properties. The first fill material provides local stress management at the slit walls where adhesion is critical, while the second fill material provides bulk filling. This local differentiation of material properties enables both complete filling and stress control simultaneously.
Solution Approach 2:
The composite material system allows independent optimization of stress characteristics and fill completeness. The first material can be selected for its stress-management properties, while the second material is selected for its ability to completely fill the remaining space. Together they provide both void-free filling and controllable stress distribution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method significantly reduces failure rates and defects by ensuring complete filling of slit structures, preventing air gaps and voids, and controlling stress, thereby enhancing the yield and reliability of 3D stacked semiconductor substrates.
Implementation Method 1
controlling a first process to apply a first material to a semiconductor substrate, the first material coating walls of the slit
Implementation Method 2
controlling a second process to apply a second material to the semiconductor substrate, the second material to be deposited in the second width of the slit
Implementation Method 3
controlling parameters like material thickness, densification temperature, and time to form a solid, non-conductive structure and manage stress across the wafer
Data Source
AI summary
A disclosed example to modulate slit stress in a semiconductor substrate includes a first controller to, after obtaining a wafer stress measurement of the semiconductor substrate, control a first process to apply a first material to the semiconductor substrate based on the wafer stress measurement, the semiconductor substrate including a slit between adjacent stacked transistor layers, the first material coating walls of the slit to reduce a first width of the slit between the adjacent stacked transistor layers to a second width; and a second controller to control a second process to apply a second material to the semiconductor substrate, the second material to be deposited in the second width of the slit, the first material and the second material to form a solid structure in the slit between the adjacent stacked transistor layers.