Spatial Light Modulator Mirror Planarity via Composite Planarization
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Solution Overview
Problem
Conventional spatial light modulators based on aluminum mirrors face limitations in mirror planarity due to polymer sacrificial layers, aluminum alloy grain structure, and thermal sensitivity, leading to reproducibility issues and limited scalability, while existing methods for using monocrystalline silicon face challenges in bonding thin membranes to CMOS wafers and require high temperatures or sensitive alignment.
Innovation Solution
A method involving direct bonding using undoped silica glass for planarization and stress relief, combined with monocrystalline silicon, allows for improved surface planarity and reproducibility, enabling the production of spatial light modulators with high mirror uniformity and scalability, using conventional semiconductor techniques at lower temperatures and avoiding contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If aluminum alloy mirrors are used for spatial light modulators, then the manufacturing process is simple and cost-effective, but the mirror planarity deteriorates due to grain structure, thermal sensitivity, and stress gradients
Solution Approach 1:
The patent changes the material parameter from aluminum alloy to monocrystalline silicon, which fundamentally alters the grain structure (from polycrystalline to single crystal), thermal expansion properties, and stress characteristics, thereby achieving superior mirror planarity while maintaining manufacturability through established semiconductor processes
Solution Approach 2:
The patent employs a composite structure combining monocrystalline silicon for the mirror layer with a polymer sacrificial layer for planarization and release, leveraging the advantages of each material: silicon provides atomic-layer planarity and thermal stability, while the polymer enables simple release processes and stress management
2Manufacturing precision
If monocrystalline silicon is used for mirrors, then mirror planarity and thermal stability are significantly improved, but the bonding process becomes more complex requiring high temperatures or precise alignment
Solution Approach 1:
The patent introduces a polymer sacrificial layer as an intermediary between the monocrystalline silicon mirror and the substrate, which simplifies the bonding process by providing a compliant interface that tolerates misalignment and reduces the need for high-temperature bonding, while also enabling simple release of the mirror structure
Solution Approach 2:
The patent performs preliminary planarization of the monocrystalline silicon surface before bonding using chemical mechanical polishing (CMP) to achieve atomic-layer flatness, ensuring that the mirror surface is optimally prepared for bonding without requiring complex high-temperature processes or precise alignment procedures
3Ease of manufacture
If aluminum alloy is used for micromirrors, then the material is easy to deposit via sputtering, but the mirror planarity deteriorates due to re-crystallization, stress relaxation, and plastic deformation during use
Solution Approach 1:
The patent changes the material from aluminum alloy to monocrystalline silicon, which eliminates grain boundary-related phenomena (re-crystallization, stress relaxation at grain boundaries) and provides superior resistance to plastic deformation, while maintaining ease of manufacture through standard semiconductor fabrication processes like CMP and selective etching
4Ease of manufacture
If polymer sacrificial layer is used for planarization, then the process is simple and cost-effective, but the mirror planarity is limited to a few nanometers due to residual surface roughness
Solution Approach 1:
The patent uses a composite planarization approach combining polymer sacrificial layer deposition with chemical mechanical polishing (CMP) of the polymer surface, leveraging the polymer's ease of deposition and the CMP process's ability to achieve sub-nanometer surface flatness, thereby combining simplicity with high precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves significant improvement in mirror planarity and reproducibility, enabling the fabrication of large-scale spatial light modulators with integrated control electronics, reducing production effort and costs, and ensuring long-term stability and high yield.
Implementation Method 1
generating a first planarization layer from a first starting material on the support wafer with a first method to fill in the structures of the structured surface of the support wafer
Implementation Method 2
direct bonding using undoped silica glass for planarization and stress relief, combined with monocrystalline silicon
Data Source
AI summary
A method of producing a device with a movable portion spaced apart from a support wafer comprises a step of providing the support wafer having a structured surface and a further step of providing a device wafer with a backing layer and a device layer disposed thereon. Further, the method comprises the step of generating a first planarization layer from a first starting material on the support wafer with a first method to fill in the structures of the structured surface of the support wafer, whereby a surface with a first degree of planarization is obtained. Further, the method comprises a step of generating a second planarization layer from a second starting material on the planarized surface of the support wafer with a second method to obtain a surface with a second degree of planarization, which is higher than the first degree of planarization, wherein the first and second planarization layers can be removed together. Additionally, the support wafer is connected to the device wafer such that the device layer and the planarized surface of the support wafer are connected. Then, removing the backing layer of the device wafer is performed, followed by structuring the resulting structure and removing the first and second planarization layers via a common method to generate the moveable portion of the device.