SLO Scheduler Memory Bandwidth Allocation

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Solution Overview

Problem

Conventional priority schemes in processing systems lead to over-allocation of resources to high-priority processes, resulting in wasted computing capacity, especially during periods of low activity, as they rigidly manage resources without effectively utilizing idle resources for low-priority processes.

Innovation Solution

Implementing a Service Level Objective (SLO) scheduler that manages limited resources by ensuring latency-sensitive processes meet their memory bandwidth floors while allowing non-latency-sensitive processes to consume more resources, thereby optimizing resource utilization and reducing idle time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional priority schemes allocate resources to high-priority processes, then high-priority processes receive guaranteed resource access, but computing capacity is wasted when high-priority processes are idle

Engineering Contradiction:
Improveresource guarantee for high-priority processesVSAvoidsystem throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic resource allocation where the scheduler continuously monitors resource usage and adjusts allocations in real-time. When high-priority processes are idle, their resources are dynamically reallocated to low-priority processes, and when they become active, resources are restored. This dynamic adjustment resolves the contradiction by making resource allocation flexible rather than static.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of resource allocation from fixed to variable based on actual demand. The scheduler monitors metrics such as process activity status and memory bandwidth usage, and adjusts resource distribution parameters accordingly. This allows the system to maintain reliability guarantees while improving overall productivity through parameter optimization.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If rigid priority rules are enforced, then high-priority processes maintain their resource allocations, but low-priority processes cannot utilize available computing capacity during low activity periods

Engineering Contradiction:
Improveresource allocation stabilityVSAvoidwasted computing capacity
Core Design Contradiction:
Stability of the object's compositionVSLoss of energy

Solution Approach 1:

The patent implements a resource borrowing and returning mechanism where high-priority processes temporarily discard their resource allocations when idle, allowing low-priority processes to recover and utilize the freed capacity. When high-priority processes become active, they recover their allocations. This resolves the contradiction by allowing temporary resource redistribution without permanent loss of stability.

Inventive Principle:
Principle #34Discarding and recovering

Solution Approach 2:

The scheduler implements self-service resource management where processes effectively serve each other's resource needs. When high-priority processes are idle, their resources automatically become available to low-priority processes without manual intervention. The system self-regulates resource distribution based on actual demand patterns.

Inventive Principle:
Principle #25Self-service

3Reliability

If memory bandwidth is allocated to ensure latency-sensitive processes meet their floors, then service level objectives are met, but non-latency-sensitive processes suffer from resource constraints

Engineering Contradiction:
Improveservice level objective complianceVSAvoidoverall system utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments memory bandwidth allocation into two distinct pools: one dedicated to latency-sensitive processes to ensure their service level objectives are met, and another available pool for non-latency-sensitive processes. The scheduler dynamically manages these segments, ensuring that SLO compliance is maintained while maximizing overall system utilization by allowing flexible access to the available pool.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10700954B2Scheduling memory bandwidth based on quality of service floorbackground
Publication Date: 2020.06.30 ADVANCED MICRO DEVICES INC
  • US10700954B2 patent drawing
  • US10700954B2 patent drawing
  • US10700954B2 patent drawing

AI summary

A system includes a multi-core processor that includes a scheduler. The multi-core processor communicates with a system memory and an operating system. The multi-core processor executes a first process and a second process. The system uses the scheduler to control a use of a memory bandwidth by the second process until a current use in a control cycle by the first process meets a first setpoint of use for the first process when the first setpoint is at or below a latency sensitive (LS) floor or a current use in the control cycle by the first process exceeds the LS floor when the first setpoint exceeds the LS floor.