Slope ADC Reset Capacitor Scheme for Low-Frequency Noise Cancellation
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Solution Overview
Problem
Integrator noise sources in slope ADCs affect the accuracy of analog-to-digital conversion, necessitating a solution to reduce noise and improve precision.
Innovation Solution
A method involving an integration phase where an input analog signal is applied to an integrator with an integration capacitor, using a reset capacitor to discharge noise signals during reset periods, and counting events to obtain a digital value, with operational amplifiers and control signals managing the capacitors to minimize noise influence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a reset capacitor is used to discharge noise signals during reset periods, then measurement precision is improved, but device complexity increases
Solution Approach 1:
A reset capacitor is introduced as an intermediary element between the integrator output and ground. This capacitor acts as a noise discharge path during reset periods, eliminating the need for complex noise filtering circuits while improving conversion accuracy by removing low-frequency noise contributions from the integrator.
Solution Approach 2:
The patent changes the operational parameters of the integrator by controlling the reset capacitor's connection state through a control signal. During reset periods, the reset capacitor is connected to discharge noise; during integration periods, it is disconnected to maintain normal operation. This parameter switching approach improves precision without requiring permanently complex circuitry.
2Object-generated harmful factors
If the integration capacitor is completely discharged during reset periods, then noise contribution is reduced, but conversion time increases
Solution Approach 1:
The reset capacitor is activated periodically during reset periods rather than continuously. This periodic discharge approach allows the integrator to be completely reset and noise to be eliminated at regular intervals, while maintaining normal integration operation during active periods. The periodic nature ensures noise reduction without continuously extending conversion time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively removes extra noise contributions from the integrator, enhancing the precision of the analog-to-digital conversion by discharging the integration capacitor completely during reset periods, thereby improving resolution without complex circuits.
Implementation Method 1
a reset capacitor submitted twice to the noise signal generated by the integrator during each reset period
Data Source
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AI summary
The present disclosure relates to a method for converting an input analog signal into an output digital value, the method comprising, during an integration phase: applying an input analog signal (Ic) to an input of an integrator (OP1-CI) comprising an integration capacitor (CI) connected between the input and an output of the integrator; submitting a reset capacitor (CR) to a first reference voltage (Vth); each time a voltage (Vi) of the integrator output reaches a second reference voltage (Vrf-Vth), generating an event in an event signal (EVT), submit the reset capacitor to a noise signal (Vn1) generated by the integrator coupling the integration capacitor to the reset capacitor to reset the charge of the integration capacitor; and counting the generated events in the event signal during the integration phase to obtain a digital value (DO) corresponding to the input analog signal.