Slope Compensation for Analog Neuromorphic Memory Read Accuracy
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Solution Overview
Problem
Analog neuromorphic memory systems are sensitive to mismatching between memory cells and transistors due to differences in current-voltage characteristic curves, leading to inaccuracy in read operations.
Innovation Solution
A slope compensation system is implemented to normalize the current-voltage characteristic curves of reference transistors and memory cells, using techniques such as gate-source voltage adjustment and absolute normalizer circuits to ensure consistency across devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If reference transistors and memory cells are used without slope compensation, then the device complexity is low, but the measurement precision of read operations deteriorates due to mismatching between current-voltage characteristic curves
Solution Approach 1:
An absolute normalizer circuit is introduced as an intermediary component between the reference transistor and memory cell. This circuit receives the gate-source voltage of the reference transistor and generates a compensated gate-source voltage for the memory cell by normalizing the slope of its current-voltage characteristic curve, thereby mediating the mismatch between the two devices and improving read operation accuracy
Solution Approach 2:
The patent changes the electrical parameters (gate-source voltage, current) of the memory cell through the absolute normalizer circuit to match the slope characteristics of the reference transistor. By dynamically adjusting these parameters based on the reference transistor's state, the system achieves better matching without requiring physically identical devices
2Measurement precision
If multiple reference transistors are used to compensate for slope variations, then the measurement precision improves, but the device complexity and area increase
Solution Approach 1:
Instead of using multiple physical reference transistors, the patent creates an electrical copy of the reference transistor's characteristics through the absolute normalizer circuit. The circuit replicates the slope normalization function for multiple memory cells without requiring proportional increases in reference transistor count, thereby reducing the area overhead while maintaining precision
3Reliability
If the current-voltage characteristic curves are not normalized, then the ease of operation is high, but the reliability of the analog neural network deteriorates due to sensitivity to mismatching
Solution Approach 1:
The absolute normalizer circuit implements a feedback mechanism where the gate-source voltage of the reference transistor is continuously monitored and used to generate the compensated gate-source voltage for memory cells. This feedback loop ensures that slope variations are dynamically compensated, improving the reliability of the analog neural network while maintaining manageable device complexity
Data Source
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AI summary
Numerous embodiments are disclosed for compensating for differences in the slope of the current-voltage characteristic curve among reference transistors, reference memory cells, and flash memory cells during a read operation in an analog neural memory in a deep learning artificial neural network. The embodiments are able to compensate for slope differences during both sub-threshold and linear operation of reference transistors.