Slope Regulator Analog Core for Switching Power FETs
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Solution Overview
Problem
Existing power MOSFET circuits face challenges in accurately controlling the output voltage slope, leading to unreliable and inefficient EMI performance, high power consumption, and complex high-voltage circuitry, which limits gate switching speed and increases silicon area usage.
Innovation Solution
A switching power FET circuit with a slope regulator analog core that utilizes dual AC loops with capacitors for integrating current during turn-on and turn-off phases, reducing the need for high bandwidth error amplification and minimizing power consumption, while maintaining accurate output slope control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If current source-switch combinations are used to limit gate switching current, then output voltage slope can be controlled, but the output slope becomes highly non-linear and unreliable
Solution Approach 1:
The patent implements a feedback mechanism by sensing the actual output voltage slope and comparing it with a reference slope. The error signal is then amplified and used to adjust the gate switching current in real-time, ensuring the output slope matches the desired trajectory despite variations in FET capacitance and operating conditions.
Solution Approach 2:
The patent replaces the purely passive current-limiting approach (resistors or fixed current sources) with an active control system using operational amplifiers and feedback loops. This substitution enables dynamic adjustment of the gate current based on actual slope conditions, transforming a static limitation into a controlled regulation process.
2Manufacturing precision
If high bandwidth error amplification is used to maintain accurate slope control, then slope accuracy is improved, but power consumption increases
Solution Approach 1:
The patent employs dynamic biasing of the error amplifier, where the amplifier is activated only during FET switching transitions and remains inactive during steady-state operation. This dynamic operation mode allows the system to achieve high bandwidth and accurate slope control during transitions while minimizing average power consumption through periods of inactivity.
Solution Approach 2:
The error amplifier operates periodically during switching transitions rather than continuously. The circuit is designed to enable the amplifier only when needed for slope control during turn-on and turn-off events, creating a periodic activation pattern that reduces overall power consumption while maintaining control accuracy when required.
3Manufacturing precision
If high-voltage circuitry is used for slope control, then accurate control is achieved, but silicon area and complexity increase
Solution Approach 1:
The patent introduces an intermediary low-voltage error amplifier stage that operates between the control logic and the high-voltage FET gate. This intermediary uses voltage division and scaling techniques to achieve high-voltage slope control through low-voltage signaling, eliminating the need for complex high-voltage circuitry while maintaining control accuracy.
Solution Approach 2:
The patent changes the voltage scale parameter by using voltage dividers and scaling networks to translate high-voltage FET gate control requirements into low-voltage domain operations. The error amplifier works at low voltages but controls high-voltage switches through scaled-down signals, simplifying the overall circuit architecture and reducing silicon area requirements.
4Productivity
If gate switching speed is increased, then productivity is improved, but EMI emissions increase
Solution Approach 1:
The patent implements dynamic slope control where the output voltage slope is actively regulated during switching transitions. By controlling the rate of change of voltage (dv/dt) through feedback, the system achieves fast switching for high productivity while limiting EMI-generating voltage spikes, thus resolving the contradiction between speed and emissions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves reliable and accurate output slope control with reduced complexity, low power consumption, and immunity to supply rail switching and inductive bounces, enabling fast gate switching without high-voltage circuitry and minimizing silicon area.
Implementation Method 1
a first AC loop connected between the output and the gate, including a first capacitor, and configured to integrate current across the first capacitor during a turn-on phase
Implementation Method 2
a second AC loop connected between the output and the gate, including a second capacitor, and configured to integrate current across the second capacitor during a turn-off phase
Data Source
AI summary
In summary, a switching circuit comprising a high side (HS) switch coupled to the output, a low side (LS) switch comprising a MOSFET coupled to the output, and a slope regulator core coupled to the gate of said low side (LS) switch configured to provide control signals to said slope regulator core. In addition, a method of providing a method of a switch circuit comprising the steps the first step, (a) providing a circuit comprising a low side (LS) switch, a high side (HS) switch, and a slope regulator wherein said slope regulator comprises a fast mode, a slope regulator mode, and a hold mode, the second step (b) activating said slope regulator, the third step (c) choosing a fast mode or a slope regulation mode, the fourth step (d) applying either a fast mode or slope regulation mode; the fifth step (e) evaluating the polarity of the signal, the sixth step (f) toggle signal hold_on if the gate is low or toggle signal hold_off if the gate is high.