Sloppy Feedback Loop Compilation for Dataflow Pipelining

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Solution Overview

Problem

Developing dataflow applications with feedback loops is challenging due to strict timing constraints, which require manual optimization to balance latency, memory consumption, and compute throughput, limiting portability and efficiency across different hardware platforms.

Innovation Solution

Compiling dataflow applications using a sloppy timing constraint, which relaxes dependencies introduced by feedback loops, allowing the compiler to pipeline the compute block into stages and apply state changes as needed, thereby improving throughput without manual optimization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If strict timing constraints are enforced in feedback loops, then correctness is maintained, but manual optimization is required and throughput is limited

Engineering Contradiction:
ImprovecorrectnessVSAvoidthroughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent changes the timing parameter from strict to sloppy, allowing the feedback loop to tolerate timing variations. This enables the compiler to pipeline compute blocks into multiple stages, improving throughput while maintaining correctness through careful state management and dependency tracking.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the compute block into multiple pipeline stages, allowing different stages to execute in parallel. This segmentation, combined with sloppy timing constraints, enables the feedback loop to process multiple data elements simultaneously, significantly improving throughput without sacrificing correctness.

Inventive Principle:
Principle #1Segmentation

2Productivity

If manual optimization is performed to balance latency, memory consumption, and compute throughput, then performance is improved, but development complexity and time increase

Engineering Contradiction:
ImproveperformanceVSAvoiddevelopment complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent enables the compiler to automatically optimize feedback loops with sloppy timing constraints without requiring manual intervention. The compiler analyzes dependencies, pipelines compute blocks, and generates optimized code automatically, allowing the system to self-optimize while maintaining high performance.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent replaces manual optimization efforts with an automated compiler-based system. Instead of programmers manually balancing latency, memory, and throughput, the compiler automatically performs these optimizations using sophisticated analysis and transformation algorithms.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Stability of the object's composition

If feedback loops are tightly coupled with strict timing, then data consistency is ensured, but parallelism and portability are limited

Engineering Contradiction:
Improvedata consistencyVSAvoidportability
Core Design Contradiction:
Stability of the object's compositionVSAdaptability or versatility

Solution Approach 1:

The patent introduces dynamic timing constraints that adapt to the specific hardware platform and data dependencies. Rather than enforcing a fixed strict timing model, the system dynamically determines appropriate timing based on platform characteristics, enabling both data consistency and portability across different hardware architectures.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The sloppy feedback loop model serves multiple functions: it maintains data consistency through dependency tracking, enables parallelism through pipelining, and provides portability by adapting to different hardware platforms. This universal approach replaces the need for platform-specific optimization code.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10261766B2Sloppy feedback loop compilation
Publication Date: 2019.04.16 HEWLETT PACKARD ENTERPRISE DEV LP
  • US10261766B2 patent drawing
  • US10261766B2 patent drawing
  • US10261766B2 patent drawing

AI summary

A system, method, and a computer-readable storage device for sloppy feedback loop compilation are described herein. For example, a dataflow application definition can be obtained. The dataflow application definition may include a feedback loop bounding a compute block. It may then be determined that the feedback loop is to be compiled as a sloppy feedback loop. The dataflow application can then be compiled as an executable object that pipelines the compute block of the dataflow application.