Small Unit Internal Verify Read for Flash Memory Block Usability
Solution Overview
Problem
The existing methods for determining unusable memory blocks in flash memory devices face challenges due to the difficulty in accurately measuring small differences between judged and reference currents, leading to potential misclassification of memory blocks as defective.
Innovation Solution
The implementation of a small unit internal verify read operation that reduces the number of columns compared by masking a subset of columns, allowing for more accurate error bit representation and judgment, using a dynamic data cache and current comparator circuit to assess memory blocks' usability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the entire memory block is read for verification, then the accuracy of error bit detection is improved, but the measurement precision deteriorates due to difficulty in accurately measuring small current differences
Solution Approach 1:
The memory block verification is divided into multiple smaller units (pages or segments) rather than verifying the entire block at once. The verification process reads and compares data in segmented portions, allowing for more precise current measurements on smaller data sets while maintaining overall verification accuracy through systematic coverage of all block segments.
2Reliability
If all columns are compared in the verification read, then the completeness of defect detection is improved, but the complexity of the measurement process increases
Solution Approach 1:
The column comparison process is segmented into multiple passes or stages. Instead of comparing all columns simultaneously, the verification process divides columns into groups and performs comparisons in sequential stages, reducing the complexity of each individual measurement while ensuring all columns are ultimately verified through the segmented approach.
Solution Approach 2:
The verification process performs comparisons on a partial basis initially, focusing on critical or high-priority columns first. By performing partial verification on selected columns and then expanding to include remaining columns in subsequent stages, the system achieves complete defect detection while managing measurement complexity through progressive rather than simultaneous action.
Data Source
AI summary
Methods for small unit internal verify read operation and a memory device are disclosed. In one such method, expected data is programmed into a grouping of columns of memory cells (e.g., memory block). Mask data is loaded into a third dynamic data cache of three dynamic data caches. The expected data is loaded into a second data cache. After a read operation of programmed columns of memory cells, the read data is compared to the expected data and error bit indicators are stored in the second data cache in the error bit locations. The second data cache is masked with the mask data so that only those error bits that are unmasked are counted. If the number of unmasked error bit indicators is greater than a threshold, the memory block is marked as unusable.