Address Translation for Smaller Memory Programs in Larger Spaces
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Solution Overview
Problem
Modern computer architectures face challenges in efficiently utilizing storage space when running programs with smaller memory-address width in larger memory-address width address spaces, leading to occupied below-the-bar storage being large and increasing, which limits available space for data or additional programs.
Innovation Solution
A method is implemented to divide smaller memory-address width program executable code into portions, reserving virtual storage areas in both smaller and larger memory-address width address spaces, and providing a relocation factor for processor threads to translate addresses from the smaller to the larger space, allowing the program to run in the larger space while freeing up below-the-bar storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If smaller memory-address width programs are run in larger memory-address width address space using traditional methods, then the programs can execute, but below-the-bar storage is occupied and cannot be freed up for data or additional programs
Solution Approach 1:
The patent divides the program code into multiple segments (first code segment, second code segment, etc.) and places them in different storage locations. The first code segment resides in below-the-bar storage while subsequent segments reside in above-the-bar storage. This segmentation allows the program to execute in the larger address space while maintaining compatibility with smaller address width instructions, thereby freeing up below-the-bar storage for other uses.
Solution Approach 2:
The patent introduces a runtime system that acts as an intermediary between the executing program and the storage system. This runtime system transparently handles code segmentation, relocation, and loading, allowing smaller memory-address width programs to run in a larger address space without modifying the program itself. The runtime system manages the complexity of address translation and code segment organization.
2Ease of operation
If below-the-bar storage is used for RMODE-31 programs, then program execution is possible, but the storage cannot be freed up for data or more programs
Solution Approach 1:
The patent segments the program code so that only the essential first code segment resides in below-the-bar storage, while additional code segments are placed in above-the-bar storage. This minimal presence in below-the-bar storage maintains program executability while maximizing storage availability for data and other programs.
Solution Approach 2:
The patent transitions from a single-dimensional storage model (everything in below-the-bar) to a multi-dimensional model utilizing both below-the-bar and above-the-bar storage spaces. By organizing code segments across these different storage dimensions, the system maintains execution capability while optimizing storage utilization.
Data Source
AI summary
Method and system are provided for running a smaller memory-address width program in a larger memory-address width address space. The method includes: dividing a smaller memory-address width program executable code into a set of portions; reserving a first virtual storage area in a part of an address space accessed using a smaller memory-address width address; and reserving a set of second virtual storage areas in a part of the address space accessed using a larger memory-address width address to accommodate the program executable code. The method provides a relocation mechanism to relocate a processor thread by translating using a relocation factor from an address in the reserved first virtual storage area to the one of the reserved second virtual storage areas containing the executable code.