Smart Card Data Stream Marking for Cache Interference

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Solution Overview

Problem

Conventional systems face challenges in accurately transmitting response messages from smart cards due to cache interference, leading to misinterpretation of data and security issues when combined with flash memory in devices like cell phones with Java systems, which do not support direct access to flash memory without using the cache.

Innovation Solution

A method and system that involve adding a specific mark to data streams transmitted to a storage device with a non-volatile memory and a chip, allowing the controller to distinguish between data for the chip and the memory, and using read commands to ensure the chip's response message is accurately transmitted by verifying the presence of the mark and updating cache data to prevent errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a cache is used to temporarily store transmitted data between host and memory card, then data transmission speed is improved, but response messages from smart card chip are misinterpreted as cached data leading to transmission errors

Engineering Contradiction:
Improvedata transmission speedVSAvoidresponse message transmission accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent introduces a specific mark as an intermediary identifier embedded in data streams. This mark acts as a mediator that enables the host to distinguish between cached data and actual response messages from the smart card chip, resolving the conflict between using cache for speed and ensuring message accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent uses a specific mark (analogous to a distinctive identifier or 'color') to differentiate between different types of data streams. By embedding this mark in response messages, the system can visually (digitally) distinguish legitimate messages from cached data, maintaining both cache performance and message reliability.

Inventive Principle:
Principle #32Color changes

2Ease of operation

If a specific command is used to differentiate data transmitted to smart card from flash memory, then data routing is improved, but hardware or driver support is lacking and command data is confused with normal flash memory data

Engineering Contradiction:
Improvedata routing capabilityVSAvoidhardware and driver complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent changes the parameter of data stream identification from using separate commands to using embedded marks within the data stream itself. This approach maintains ease of operation by keeping the interface simple while avoiding increased device complexity in hardware and drivers.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If Java system does not support direct access to flash memory without cache, then system compatibility is improved, but smart card response messages cannot be inerrably transmitted due to cache interference

Engineering Contradiction:
Improvesystem compatibilityVSAvoidresponse message transmission accuracy
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary action by embedding the specific mark in data streams before transmission. This advance preparation enables the receiving end to reliably identify and process response messages even when cache is involved, ensuring accurate transmission while maintaining compatibility with Java systems that require cache usage.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8544424B2System, controller and method thereof for transmitting and distributing data stream
Publication Date: 2013.10.01 PHISON ELECTRONICS
  • US8544424B2 patent drawing
  • US8544424B2 patent drawing
  • US8544424B2 patent drawing

AI summary

A system, a controller, and a method for transmitting and distributing a data stream from a host to a storage device having a non-volatile memory and a chip are provided. A specific mark is added into a data stream which is transmitted from the host to the storage device, such that the data stream can be dispatched to the chip by transmitting a write command. Then, a response message generated by the chip can be received inerrably by executing a plurality of read commands.