Smart IC Substrate Plating Layout for Lower Gold Use
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Solution Overview
Problem
Existing smart IC substrates face inefficiencies in the plating process, leading to increased process costs due to unnecessary formation of plating layers and the use of gold, which is costly.
Innovation Solution
The smart IC substrate features a structured plating layer configuration with varying thicknesses and materials, including a thicker layer connected to the chip and thinner layers elsewhere, optimizing the plating process and reducing gold usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If immersion plating is performed to improve plating efficiency, then plating process efficiency is improved, but plating layers are formed in regions where they are not required, increasing process cost
Solution Approach 1:
The plating layer is segmented into multiple regions with different thicknesses: a first plating layer with first thickness, a second plating layer with second thickness greater than the first, and a third plating layer with third thickness greater than the second. This segmentation allows selective plating in different regions, forming plating layers only where required while avoiding unnecessary plating in other regions, thus resolving the contradiction between plating efficiency and material waste
Solution Approach 2:
Different regions of the substrate are assigned different plating layer thicknesses based on their specific functional requirements. The first region receives a thinner plating layer sufficient for its needs, while the second and third regions receive progressively thicker plating layers where enhanced conductivity or bonding is required. This local quality approach ensures plating resources are allocated efficiently without forming excessive plating layers in regions where they are not needed
2Reliability
If a uniform thick plating layer is formed across the entire substrate, then wire bonding reliability is improved, but process cost increases due to excessive gold usage
Solution Approach 1:
The plating layer thickness is optimized locally for each region based on its specific functional requirements. The first region, which may not require wire bonding, receives a thinner plating layer reducing gold consumption. The second and third regions, which require stable wire bonding, receive progressively thicker plating layers to ensure reliable electrical connection. This local optimization maintains wire bonding reliability where needed while minimizing gold usage in regions where it is not required
Solution Approach 2:
The substrate surface is segmented into multiple regions (first, second, and third regions) with distinct plating layer thicknesses. This segmentation allows the plating process to target specific areas requiring enhanced properties, rather than uniformly plating the entire substrate. The progressive thickness increase from first to third region ensures adequate plating only where functional requirements demand it, reducing overall material consumption while maintaining necessary reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances process efficiency and reduces costs by minimizing gold usage while maintaining stable wire bonding, resulting in a thinner IC module and card.
Implementation Method 1
a first plating layer disposed on one surface of the metal layer; a second plating layer and a third plating layer disposed on another surface of the metal layer
Data Source
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AI summary
A smart IC substrate according to an embodiment includes a substrate including a first surface and a second surface opposite the first surface, and having first and second holes passing through the first surface and the second surface and spaced apart from each other in a horizontal direction; a bonding layer disposed on the first surface; a metal layer disposed on the bonding layer; a first plating layer disposed on one surface of the metal layer; a second plating layer and a third plating layer disposed on another surface of the metal layer, wherein the second plating layer overlaps the first hole, the third plating layer overlaps the second hole, and the third plating layer has a thickness greater than that of the second plating layer.