Smart IC Substrate Circuit Layout for Via-Aware Identification Patterns
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Solution Overview
Problem
Existing smart IC modules face challenges in forming identification patterns and improving exterior design flexibility due to limitations imposed by via holes and increased module size when forming separate dummy patterns.
Innovation Solution
A smart IC substrate with a substrate having a first and second surface, featuring a first and second circuit pattern with different thicknesses, and a space region between the circuit patterns, where the substrate includes via holes passing through both surfaces, allowing for the formation of identification patterns without being restricted by via hole positions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via holes are formed to connect circuit patterns, then electrical connection is achieved, but the space and location for identification patterns are limited
Solution Approach 1:
The circuit pattern is segmented into two parts: a first circuit pattern part and a second circuit pattern part with different thicknesses. The second part is disposed only in the first region and can be positioned to overlap with via holes, allowing identification patterns to be formed in areas that would otherwise be occupied by via hole structures.
Solution Approach 2:
The patent utilizes the thickness dimension to resolve the conflict. By creating circuit pattern parts with different thicknesses and positioning them in different regions (first region vs. second region), the design allows identification patterns to be formed in the first region where via holes are present, while maintaining electrical connectivity through the via holes in the second region.
2Reliability
If separate dummy patterns are formed for identification, then identification functionality is achieved, but the size of the smart IC module increases
Solution Approach 1:
The patent merges the identification pattern function with the existing circuit pattern structure. The second circuit pattern part, which is disposed only in the first region, serves dual purposes: maintaining electrical connectivity and providing the identification pattern. This eliminates the need for separate dummy patterns that would increase module size.
Solution Approach 2:
The circuit pattern is designed to serve multiple functions simultaneously. The first circuit pattern part provides electrical connection, while the second circuit pattern part provides both electrical connection and identification functionality. This multi-functionality approach eliminates the need for additional dedicated identification elements.
3Ease of manufacture
If circuit patterns have uniform thickness, then manufacturing is simplified, but design flexibility for identification patterns is reduced
Solution Approach 1:
The patent applies local quality by creating circuit pattern parts with different thicknesses in different regions. The first circuit pattern part has one thickness while the second circuit pattern part has a different thickness, allowing each region to be optimized for its specific function while maintaining overall manufacturability.
Data Source
AI summary
A smart IC substrate according to an embodiment includes a substrate including a first surface and a second surface opposite to the first surface; a first circuit pattern disposed on the first surface; and a space region between the first circuit pattern, wherein the substrate includes a plurality of via holes passing through the first surface and the second surface, wherein the substrate has a first region and a second region other than the first region, wherein the first circuit pattern includes a first circuit pattern part and a second circuit pattern part having different thicknesses, wherein a thickness of the first circuit pattern part is greater than a thickness of the second circuit pattern part, wherein the first circuit pattern part is disposed in the first region and the second region, wherein the second circuit pattern part is disposed only in the first region, and wherein the second circuit pattern part is disposed in at least one of a position that overlaps the via hole and a position that does not overlap the via hole in a thickness direction of the substrate.