Smart Interface Converters for IEEE 1588 WAN Synchronization

Solution Overview

Problem

Current IEEE 1588 time synchronization protocols are limited to small networks and struggle with asymmetrical and varying delays introduced by network elements like switches and routers, making it impractical for wide area networks without significant investment in compliant devices.

Innovation Solution

The use of smart interface converters that wrap legacy network elements to provide delay transparency by timestamping and modifying IEEE 1588 packets, or forming a boundary clock by connecting smart interface converters to legacy elements, allowing for distributed clock synchronization across multiple network elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If IEEE 1588 is deployed across wide area networks, then time synchronization accuracy is improved, but device complexity and investment requirements increase significantly

Engineering Contradiction:
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces smart interface converters as intermediary devices that wrap around legacy network elements. These converters act as mediators between the existing network infrastructure and IEEE 1588 synchronization protocol, enabling time synchronization across WANs without requiring all network elements to be IEEE 1588 compliant. The smart interface converters handle the complexity of delay compensation and timestamping, allowing standard network equipment to participate in synchronized networks.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the network into zones with master clock devices and slave devices, with smart interface converters positioned at strategic locations. This segmentation allows IEEE 1588 synchronization to be implemented in manageable portions across the network, rather than requiring universal deployment of compliant network elements throughout the entire WAN.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If boundary clocks are used to reduce packet delays, then time synchronization is improved, but the requirement for multiple network elements with boundary clock capabilities increases complexity

Engineering Contradiction:
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The smart interface converters serve as intermediaries that provide boundary clock functionality without requiring legacy network elements to implement complex boundary clock capabilities. The converters handle the IEEE 1588 message timestamping and delay compensation, allowing standard network equipment to function as simple passive elements in the synchronization path.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Instead of requiring each network element to implement full boundary clock functionality, the patent uses multiple smart interface converters that replicate the necessary timing functions. Each converter independently handles timestamping and delay compensation for its segment of the network, distributing the complexity across multiple simpler devices rather than requiring complex functionality at each node.

Inventive Principle:
Principle #26Copying

3Measurement precision

If transparent clocks modify packets to account for delays, then time synchronization is improved, but processing complexity and packet modification overhead increase

Engineering Contradiction:
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The smart interface converters act as intermediaries that perform packet timestamping and delay compensation only at specific points in the network path, rather than requiring continuous processing at every network element. This approach reduces the overall processing burden while maintaining synchronization accuracy across the WAN.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The smart interface converters perform delay compensation calculations in advance by measuring actual packet delays during network operation. These pre-calculated delay values are then used to adjust timestamps on subsequent packets, reducing the complexity of real-time processing requirements and allowing simpler packet modification operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7689854B2Method and apparatus for establishing IEEE 1588 clock synchronization across a network element comprising first and second cooperating smart interface converters wrapping the network element
Publication Date: 2010.03.30
  • US7689854B2 patent drawing
  • US7689854B2 patent drawing
  • US7689854B2 patent drawing

AI summary

Apparatus for making legacy network elements transparent to IEEE 1588 Precision Time Protocol operation. Network elements are wrapped by device(s) capable of providing either transparent clock or boundary clock operation. In one embodiment, smart interface converters are used to provide transparent clock or boundary clock operation. The smart interface converters work cooperatively.