Smart NIC Service Scheduling for CPU-Offloaded Packet Processing
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Solution Overview
Problem
Conventional Network Interface Cards (NICs) in cloud data centers share CPU resources for packet processing and networking, leading to overloading and reduced efficiency, as they lack dedicated processing units to offload advanced functionalities from the host CPU.
Innovation Solution
Incorporating a processing unit, such as a multi-core ARM processor or FPGA, into the NIC to offload datapath processing, enabling dynamic service deployment, virtual topology generation, and enhanced packet routing within a NIC fabric, managed by an edge services controller.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If packet processing and datapath functionality are performed by the host CPU in conventional NICs, then basic networking functionality is provided, but CPU resources are overloaded and processing efficiency is reduced
Solution Approach 1:
The patent extracts datapath processing functionality from the host CPU and relocates it to a dedicated processing unit within the NIC. This includes packet forwarding, policing, and other advanced networking functions that are moved out of the CPU's responsibility, thereby reducing CPU load and improving packet processing efficiency without requiring complex CPU-NIC coordination
Solution Approach 2:
The patent segments the networking functions into distinct components: basic L2/L3 functionality remains in the NIC's ASIC, while advanced datapath processing is assigned to a separate processing unit within the NIC. This segmentation allows each component to specialize in specific tasks, improving overall efficiency while maintaining clear functional boundaries
2Productivity
If dedicated processing units are added to NICs to offload datapath processing, then networking efficiency is enhanced and CPU load is reduced, but NIC complexity and cost increase
Solution Approach 1:
The patent merges the host CPU's datapath processing responsibilities with the NIC's existing ASIC capabilities by introducing an integrated processing unit within the NIC. This unit combines packet processing, policing, and forwarding functions in a single consolidated component, reducing overall system complexity despite adding dedicated processing capability
Solution Approach 2:
The processing unit within the NIC is designed to perform multiple networking functions including packet forwarding, policing, and other advanced datapath operations. This multi-functional design consolidates what would otherwise require separate dedicated hardware components, thereby enhancing networking capacity without proportionally increasing NIC complexity
Data Source
AI summary
An example system comprises a plurality of servers comprising respective network interface cards (NICs) connected by physical links in a physical topology, wherein each NIC of the plurality of NICs comprises an embedded switch and a processing unit coupled to the embedded switch; and an edge services controller configured to program the processing unit of a network interface card of the plurality of network interface cards to: receive, at a first network interface of the NIC, a data packet from a physical device; based on the data packet being received at the first network interface, modify the data packet to generate a modified data packet; and output the modified data packet to the physical device via a second network interface of the NIC.