SMBus Pull-Up Resistor Optimization for Drive Current Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing System Management Bus (SMBUS) link is influenced by the number of PSU power supplies, leading to insufficient driving capacity and abnormal signal transmission, which affects the monitoring of power consumption in data centers.
Innovation Solution
The implementation of optimized pull-up resistors on the motherboard side, specifically the first and second pull-up resistors, ensures that the driving capacity of the SMBUS link is maintained within a range of 0.5 to 0.9 times the driving current threshold, reducing the impact of PSU power supplies and enhancing link stability by connecting them to the clock and data ends of the motherboard and PSU power supply chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple PSU power supplies are connected to the SMBUS link for redundancy monitoring, then the power supply reliability is improved, but the driving capacity of the SMBUS link deteriorates due to increased load on the bus
Solution Approach 1:
The patent applies local quality by differentiating the pull-up resistor configuration between the motherboard side and PSU side. The motherboard uses a first pull-up resistor (e.g., 1.9KΩ) while each PSU uses a second pull-up resistor (e.g., 20KΩ). This asymmetric local configuration allows the motherboard to provide strong driving capacity while PSUs contribute minimal load, enabling multiple PSUs to be connected without compromising bus driving capacity.
Solution Approach 2:
The patent changes the resistance parameter values to resolve the contradiction. By setting the first pull-up resistor to a low value (1.9KΩ) and the second pull-up resistor to a high value (20KΩ), the system ensures that even with multiple PSUs connected, the total equivalent resistance remains low enough to maintain adequate driving capacity (0.5n to 0.9n times the threshold) while supporting redundant power supply monitoring.
2Reliability
If the driving capacity is increased to ensure normal signal transmission, then the signal transmission reliability is improved, but the influence of PSU power supplies on the link deteriorates
Solution Approach 1:
The patent implements local quality by assigning different resistance characteristics to different parts of the system. The motherboard's first pull-up resistor provides strong local driving capability to ensure signal transmission reliability, while the PSUs' second pull-up resistors are designed with high resistance to minimize their harmful influence on the link. This creates a asymmetric structure where the master device (motherboard) has strong driving capacity and slave devices (PSUs) have minimal impact.
Solution Approach 2:
The pull-up resistors act as intermediaries between the SMBUS link and the PSUs. The first pull-up resistor on the motherboard side serves as a strong intermediary ensuring signal integrity, while the second pull-up resistors on PSU sides serve as weak intermediaries that isolate the PSUs from having excessive influence on the bus, thus reducing harmful effects while maintaining connectivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution ensures stable signal transmission and improved power consumption monitoring by maintaining the driving current within the desired range, regardless of the number of PSU power supplies connected, thereby enhancing the overall stability and reliability of the SMBUS link.
Implementation Method 1
a resistance value of the first pull-up resistor satisfies that when the clock end of the motherboard chip is connected to the clock ends of any number of the PSU power supply chips, a driving current between the clock end of the motherboard chip and the clock end of each of the PSU power supply chips is greater than or equal to 0.5n and less than or equal to 0.9n
Data Source
AI summary
A system management bus link, a method and apparatus for determining the pull-up resistance thereof, and a device. The system management bus link comprises: a motherboard chip, a first pull-up resistor, and a second pull-up resistor. In the present invention, when resistance values of the first pull-up resistor and the second pull-up resistor satisfy configuring on a system management bus link any number of PSU power supplies that is smaller than or equal to a number threshold, a clock line in the link and a drive current in a data line are between a 0.5-times drive current threshold and a 0.9-times drive current threshold. Thus, the pull-up resistance of a motherboard end is optimized, which reduces the effect on the drive capacity of the number of PSU power supplies on a link, guarantees the drive capacity of the link, and improves link stability.