SMM-dependent GPIO lock for computer security
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Solution Overview
Problem
Existing computer security measures fail to prevent unauthorized changes to GPIO configurations or states, which can lead to unwanted events such as unauthorized BIOS flashes or power plane disabling, especially when rogue application-level software or erroneous operating system software is present.
Innovation Solution
Implementing SMM-dependent GPIO lock circuitry that allows changes to GPIO outputs or configurations only when authorized programs are executing, using logic gates and storage devices to enforce write access restrictions based on the microprocessor's system management mode and lock signals, ensuring that BIOS routines can initialize and lock GPIO states to prevent unauthorized modifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If GPIO configurations are made accessible to all software, then ease of operation is improved, but security is worsened due to unauthorized changes
Solution Approach 1:
The patent segments GPIO configuration access into two distinct modes: SMM mode for secure BIOS-level configuration and non-SMM mode for restricted access. This segmentation allows different software to have different levels of access rights, resolving the contradiction between ease of operation and security by enabling easy configuration during authorized phases while preventing unauthorized changes during execution phases.
Solution Approach 2:
The patent implements dynamic access control where the ability to write to GPIO configuration registers changes based on the execution phase. The write enable bit in the control register is dynamically set to 1 during SMM mode and reset to 0 during non-SMM mode. This dynamic mechanism allows the system to transition from easy configuration to secure locked state, resolving the contradiction between accessibility and security.
2Adaptability or versatility
If GPIO states can be changed freely, then adaptability is improved, but harmful factors increase due to unauthorized BIOS flashes or power plane disabling
Solution Approach 1:
The patent applies preliminary anti-action by preventing unauthorized changes before they can cause harm. The lock mechanism is activated during BIOS initialization to prevent any modifications to GPIO configurations that could lead to unauthorized BIOS flashes or power plane disabling. The write enable bit is set to 0 after BIOS initialization, creating a preemptive barrier against harmful actions while preserving adaptability during authorized phases.
Solution Approach 2:
The patent introduces an intermediary mechanism - the write enable bit in the control register - that mediates between GPIO configuration changes and actual state modifications. This intermediary layer allows the system to permit or block write operations based on execution phase, enabling adaptability when needed while preventing harmful factors through controlled restriction.
3Manufacturing precision
If BIOS routines can modify GPIO configurations, then manufacturing precision is improved for initialization, but device complexity increases due to lock mechanism
Solution Approach 1:
The patent applies preliminary action by performing all critical GPIO configurations and initialization during the SMM phase before switching to non-SMM mode. The BIOS routines complete their initialization tasks while the write enable bit is still 1, ensuring manufacturing precision is achieved during the authorized phase. After initialization, the write enable bit is set to 0, locking the configurations and preventing further changes, thus achieving both precision and security.
Solution Approach 2:
The patent changes the parameter of write enable bit in the control register to control GPIO configurability. During SMM mode, the write enable bit is set to 1, allowing BIOS routines to modify GPIO configurations with full precision. After initialization, the write enable bit is changed to 0, locking the configurations. This parameter change provides a simple mechanism that achieves both initialization precision and security without excessive complexity.
Data Source
AI summary
Computer security is enhanced by creating an environment in which changing the state of a general-purpose input/output (GPIO) output or changing the configuration of a GPIO is allowed only when authorized programs are executing. A storage device stores, responsive to a write signal, a state of a data signal. The GPIO is operable to respond to the state stored in the storage device. Control logic is operable to enable the write signal when a microprocessor in the computer is in a system management mode or a lock signal is not asserted, and to disable the write signal when the lock signal is asserted and the microprocessor is not in the system management mode.