SMMU Resource Reallocation for NoC Atomic Operation Bottlenecks

Solution Overview

Problem

In SoC architectures, the increasing number of atomic operations can lead to a shortage of write buffer/read buffer pairs in the NoC, resulting in execution latencies for application programs, and adding more buffer pairs increases area consumption and costs.

Innovation Solution

Dynamically allocate underutilized resources of the SMMU, such as walkers and translation buffers, to perform atomic operations when the NoC resources are insufficient, reducing the load on the NoC and maintaining atomic coherence without additional area or cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If more write buffer/read buffer pairs are added to the NoC to handle increasing atomic operations, then the system can support more atomic operations, but the area consumption and cost increase

Engineering Contradiction:

Improvecapacity to perform atomic operationsVSAvoidarea consumption of buffer pairs

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

The SMMU resources (walkers and translation buffers) are designed to perform both their traditional address translation functions and atomic operation execution. The walkers can dynamically switch between performing address translation for memory accesses and executing atomic operations on the NoC, allowing the same hardware resources to serve multiple purposes without requiring dedicated atomic operation hardware

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The SMMU acts as an intermediary between the NoC and memory subsystems. When atomic operations are received from the NoC, the SMMU intercepts them and executes them using its internal walkers and buffers, then returns the results to the NoC. This intermediary approach allows atomic operations to be handled without burdening the NoC buffer resources

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If more write buffer/read buffer pairs are added to the NoC to handle increasing atomic operations, then the system can support more atomic operations, but the cost increases

Engineering Contradiction:

Improvecapacity to perform atomic operationsVSAvoidmanufacturing cost

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

The SMMU resources (walkers and translation buffers) are designed to perform both their traditional address translation functions and atomic operation execution. The walkers can dynamically switch between performing address translation for memory accesses and executing atomic operations on the NoC, allowing the same hardware resources to serve multiple purposes without requiring dedicated atomic operation hardware

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The SMMU serves itself by using its own internal resources (walkers and translation buffers) to execute atomic operations that are received from the NoC. This self-service capability eliminates the need for external dedicated atomic operation handling hardware, reducing overall system cost while maintaining atomic operation capacity

Inventive Principle:

Principle #25Self-service

3Productivity

If the SMMU uses NoC write buffer/read buffer pairs to perform atomic operations, then atomic operations can be executed, but latencies occur when buffer pairs are unavailable

Engineering Contradiction:

Improveexecution of atomic operationsVSAvoidlatency in atomic operation execution

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The SMMU maintains walkers and translation buffers in a ready state that can be quickly repurposed for atomic operation execution. These resources are pre-positioned and can be dynamically allocated to atomic operations without requiring buffer allocation or setup time, enabling immediate execution when atomic operations are received from the NoC

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The SMMU acts as an intermediary between the NoC and memory subsystems. When atomic operations are received from the NoC, the SMMU intercepts them and executes them using its internal walkers and buffers, then returns the results to the NoC. This intermediary approach allows atomic operations to be handled without burdening the NoC buffer resources, eliminating the latency that would occur if the NoC buffers were unavailable

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS20260064470A1Systems and methods for dynamically allocating resources to perform atomic operations

Publication Date: 2026.03.05 QUALCOMM INC

AI summary

Systems and methods are provided for dynamically allocating preselected resources of a system-on-a-chip (SoC) for performing atomic operations in the preselected resources that would otherwise be performed in the NoC when the quantity of resources that is available in the NoC to perform an atomic operation is below a predetermined quantity and is therefore insufficient to perform the atomic operation and the quantity of the preselected resources of the SoC that is available to perform the atomic operation is above a predetermined quantity and sufficient to perform the atomic operation.