SMPS Clock Dithering With Cubic Spread Spectrum for EMI Reduction
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Solution Overview
Problem
Existing frequency dithering techniques for Switched-Mode Power Supplies (SMPS) often introduce propagation delays that limit the maximum frequency of the clock generator, making it difficult to effectively reduce Electro-Magnetic Interference (EMI) while maintaining a high switching frequency and increasing costs due to the need for bulky EMI filters.
Innovation Solution
A digital dithering clock generator using an asymmetrical cubic-modulated spread-spectrum modulator with pseudo-random offsets and discrete frequency steps, which adjusts the clock frequency through a Digital-to-Analog Converter (DAC) and offset current sources, reducing EMI without significant propagation delays and minimizing the size and cost of EMI filters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If traditional frequency dithering techniques are used to reduce EMI, then peak EMI is reduced, but propagation delays limit the maximum frequency of the clock generator
Solution Approach 1:
The patent replaces traditional analog dithering circuits with a digital dithering implementation. The digital dithering clock generator uses digital logic circuits (counter, multiplexer, DAC) to generate frequency-modulated clock signals, substituting the mechanical/analog dithering approach with a digital system that has minimal propagation delays and can operate at high frequencies while still achieving EMI reduction through frequency spreading
Solution Approach 2:
The patent implements dynamic frequency modulation by using a counter that cycles through multiple frequency steps and a multiplexer that selects different divide ratios in real-time. This dynamic switching of frequency divisions allows the clock generator to spread its spectrum across multiple frequencies rapidly, reducing peak EMI while maintaining high operating frequencies without the propagation delay limitations of traditional analog dithering
2Object-affected harmful factors
If EMI filters are added to reduce electromagnetic interference, then EMI standards are met, but the size and cost of the product increase
Solution Approach 1:
The patent applies preliminary action by implementing frequency dithering at the source (the clock generator) before the EMI is generated and propagated through the system. By spreading the spectrum of the clock signal across multiple frequencies using digital dithering techniques, the peak EMI is reduced at its origin, eliminating or reducing the need for bulky EMI filters downstream in the power supply circuit
3Object-affected harmful factors
If additional capacitors are switched on and off to provide dithering, then frequency dithering is achieved, but matching the capacitors to the large capacitor is difficult and increases cost and area
Solution Approach 1:
The patent substitutes the capacitor-switching dithering approach with a purely digital dithering mechanism. Instead of physically switching capacitors to change frequency, the invention uses a digital counter and multiplexer to dynamically select different frequency division ratios, achieving frequency dithering through digital logic operations that are simpler to implement and match without requiring precise capacitor value matching
4Object-affected harmful factors
If voltage references or current sources are altered to provide dithering, then frequency modulation is achieved, but settling time increases and noise may be coupled into the dithering devices
Solution Approach 1:
The patent replaces analog voltage reference or current source modulation with a digital dithering approach. The digital counter and multiplexer switch between predefined frequency division ratios instantaneously without the settling time issues of analog voltage references. This digital implementation eliminates the coupling of noise into dithering devices while achieving the desired frequency spreading for EMI reduction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces peak EMI by spreading the interference over a wider frequency range, achieving multiple frequency steps and randomized adjustments, thereby minimizing the maximum peak amplitude of EMI radiation while maintaining high-frequency operation and reducing the need for large EMI filters.
Implementation Method 1
A digital dithering clock generator using an asymmetrical cubic-modulated spread-spectrum modulator with pseudo-random offsets and discrete frequency steps, which adjusts the clock frequency through a Digital-to-Analog Converter (DAC)
Implementation Method 2
A digital dithering clock generator using an asymmetrical cubic-modulated spread-spectrum modulator with pseudo-random offsets and discrete frequency steps, which adjusts the clock frequency through a Digital-to-Analog Converter (DAC) and offset current sources
Data Source
AI summary
A modulator spreads the spectrum of a generated clock to reduce Electro-Magnetic Interference (EMI). A capacitor is charged by a variable current to generate a ramp voltage that is compared to a reference to end a clock cycle and discharge the capacitor. An up-down counter drives a Digital-to-Analog Converter (DAC) that controls the variable charging current to provide triangle modulation. A smaller offset current is added or subtracted for cubic modulation when the up-down counter reaches its minimum count. A frequency divider that clocks the up-down counter also clocks a Linear-Feedback Shift-Register (LFSR) to that controls pseudo-random current sources that further modulate variable current and frequency. The LFSR is clocked with the up-down counter to modulate each frequency step, or only at the minimum count to randomly modulate at the minimum frequency. Binary-weighted bits from the up-down counter to the DAC are swapped to modulate the frequency step size.