SMPS Control Circuitry Minimizing Body Diode Conduction Delay
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Solution Overview
Problem
Conventional switched mode power supplies experience efficiency losses due to body diode conduction time delays in synchronous rectifier switches, especially at higher switching frequencies, leading to reduced energy efficiency in high power density applications.
Innovation Solution
The implementation of a control circuitry with a signal coupling device, such as a transformer or capacitor, and a timer circuit that adjusts the delay value based on a gated counter, minimizes body diode conduction time by optimizing the turn-on timing of the synchronous rectifier switch, reducing losses and enhancing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If switching frequency of the output switch is increased to improve power density, then productivity increases, but switch-on delay time of the output switch causes serious efficiency loss
Solution Approach 1:
The patent applies preliminary action by using a timer circuit to generate a delayed signal that anticipates the optimal turn-on moment of the synchronous rectifier switch. The timer circuit calculates the required delay based on switching frequency and generates the delayed signal before the switch needs to turn on, ensuring the switch is activated at the precise moment when body diode conduction is minimized, thus preventing efficiency loss while maintaining high switching frequency
Solution Approach 2:
The patent implements feedback by using a gated counter to monitor the switching frequency and dynamically adjust the delay value in the timer circuit. The system continuously monitors the switching conditions and adjusts the delay timing accordingly, creating a closed-loop control system that optimizes the turn-on timing of the synchronous rectifier switch to minimize body diode conduction losses across varying operating conditions
2Volume of moving object
If switching frequency is increased to reduce component size, then volume decreases, but delay time becomes more significant relative to the switching period
Solution Approach 1:
The patent applies dynamics by making the delay value adjustable rather than fixed. The timer circuit's delay parameter is dynamically modified based on the switching frequency through the gated counter mechanism. As switching frequency increases and the switching period decreases, the system automatically adjusts the delay timing to remain proportional and optimal, ensuring that the delay remains insignificant relative to the shortened switching period even at high frequencies
Solution Approach 2:
The patent implements parameter changes by varying the delay value parameter in the timer circuit according to the switching frequency. The system changes the temporal parameter (delay time) in response to frequency changes, ensuring that the delay remains optimized across different operating conditions. This parameter adjustment allows the system to maintain efficient operation despite the reduced time margins at higher switching frequencies
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces energy losses by minimizing body diode conduction time, thereby improving the overall efficiency of switched mode power supplies, especially at higher switching frequencies.
Implementation Method 1
the signal coupling device is a transformer or a capacitor
Implementation Method 2
a timer circuit that adjusts the delay value based on a gated counter, minimizes body diode conduction time by optimizing the turn-on timing
Data Source
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AI summary
Switched mode power supply (SMPS) with a control circuitry and method of operating such a SMPS are described. The control circuitry includes a first driver to drive an input switch in response to a driving signal, a pulse circuit to generate a pulse signal in response to the driving signal, a timer circuit to generate a delayed signal in response to the pulse signal and a second driver to drive to the output switch in response to the delayed signal.