Multi-Channel SMPS Load Synchronization Control
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Solution Overview
Problem
Traditional multi-channel SMPS systems experience significant output voltage ripple when switching circuits transition from light to heavy load, requiring improved control methods to manage phase differences and switching frequencies effectively.
Innovation Solution
A method involving the generation of load indication signals to adjust clock control signals based on a fast system clock, allowing clock control signals to synchronize with preset pulses and phase differences, ensuring efficient switching control across varying load conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the switches of the plurality of switching circuits are turned on simultaneously when in heavy load, then each switching circuit can draw current from the input capacitor, but a huge input capacitor is required to prevent abrupt input voltage drop
Solution Approach 1:
The patent segments the simultaneous switching action into sequential switching by introducing phase differences between clock control signals of different switching circuits. This segmentation allows the input capacitor to charge and discharge in staggered intervals rather than simultaneously, reducing the peak current demand and enabling the use of a smaller input capacitor while maintaining the same power supply capability.
Solution Approach 2:
The patent implements periodic action by using phase-shifted clock control signals that periodically activate different switching circuits at different times. This periodic staggering of switching operations ensures that not all circuits draw current from the input capacitor at the same time, reducing the required capacitor size while maintaining continuous power delivery.
2Loss of energy
If the switching frequency is decreased to reduce output energy in light load conditions, then energy efficiency improves, but the output voltage ripple increases
Solution Approach 1:
The patent applies dynamics by making the switching frequency adjustable based on load conditions. The control system dynamically switches between different operating modes: at light load, it uses a lower switching frequency to improve efficiency, and at heavy load, it transitions to a higher switching frequency to maintain stable output voltage and reduce ripple. This dynamic frequency adjustment resolves the contradiction between energy efficiency and voltage ripple.
Solution Approach 2:
The patent changes the switching frequency parameter according to load conditions. By detecting the load state and adjusting the switching frequency accordingly, the system optimizes both energy efficiency and output voltage stability. This parameter change allows the system to operate at different frequency points to address different operational requirements.
3Quantity of substance
If the switches are required to turn on in sequence with phase differences to decrease input capacitor requirements, then the input capacitor size is reduced, but the control complexity increases
Solution Approach 1:
The patent achieves universality by using a single phase-shifted clock generation circuit that simultaneously provides synchronized clock signals to multiple switching circuits. This multi-functional circuit generates the required phase differences for all switching circuits, reducing the need for separate control circuits for each switch and thereby managing complexity while maintaining the sequential switching benefit.
4Stability of the object's composition
If clock control signals are formed at the trigger of preset pulses of the fast system clock, then synchronization is achieved, but the output voltage ripple is big when in light load
Solution Approach 1:
The patent applies dynamics by making the clock control signal generation adaptive to load conditions. In light load mode, the system dynamically adjusts to use the first pulse of the fast system clock after load transition as the trigger, which reduces voltage ripple. This dynamic adjustment maintains synchronization while adapting to changing operational requirements.
Solution Approach 2:
The patent changes the triggering parameter of the clock control signals based on load conditions. By switching between different trigger points (preset pulses vs. first pulse after load transition), the system optimizes both synchronization and voltage ripple performance across different operating modes.
Data Source
AI summary
A method for controlling a multi-channel SMPS having N switching circuits. The method is generating a fast system clock and N load indication signals indicative of load statuses of the N switching circuits, then generating N clock control signals based on the preset pulses of the fast system clock and the N load indication signals. If one of the N switching circuits is detected to transit from a heavy load condition to a light load condition, forming the corresponding clock control signal based on the first pulse of the fast system clock after the corresponding load indication signal transits from the first state to the second state.