Switch Mode Power Supply Transient Detection Circuit
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Solution Overview
Problem
Traditional switch-mode power supplies face challenges in fast and accurate transient detection and peak/valley detection due to limitations in existing error signal processing methods, which lead to delayed corrective actions and inadequate handling of consecutive load changes.
Innovation Solution
A circuit with a transient detection portion using an analogue delay line and three comparators to detect whether the difference between the output voltage and delayed analogue error signal is within a predetermined range, enabling fast and accurate peak/valley detection with reduced power and area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional voltage mode PID control is used, then the control implementation is simple, but the transient response is slow due to updating duty-cycle only once per switching cycle
Solution Approach 1:
The patent implements preliminary action by detecting transients before the traditional PID controller would respond. The transient detection circuit monitors the error signal and triggers immediate corrective action (adjusting duty-cycle to 0% or 100%) as soon as a transient is detected, rather than waiting for the next switching cycle update. This preliminary detection and immediate response significantly reduces transient recovery time while maintaining simple control implementation.
2Reliability
If error signal processing is performed before transient detection, then the transient detection is reliable, but valuable time is wasted leading to large output voltage deviation
Solution Approach 1:
The patent applies preliminary action by continuously monitoring the error signal for transient conditions without waiting for full processing cycles. The transient detection circuit is designed to immediately recognize transient patterns (rapid error signal changes) and trigger corrective action before traditional processing would complete, thus reducing detection time while maintaining reliability through dedicated transient detection logic.
Solution Approach 2:
The patent segments the error signal processing into two parallel paths: one for traditional PID control and another for transient detection. This segmentation allows transient detection to operate independently and immediately upon detecting transient conditions, without being blocked by the sequential processing required for reliable error signal analysis in traditional methods.
3Ease of operation
If peak/valley detection is performed on output voltage, then the detection is straightforward, but parasitic ESR causes time lag in accurate peak/valley determination
Solution Approach 1:
The patent uses the error signal as an intermediary to detect peaks and valleys more accurately. Instead of directly monitoring output voltage (which is distorted by parasitic ESR causing time lag), the transient detection circuit monitors the error signal that leads the voltage response. This intermediary approach allows accurate detection of the moment when dVout/dt=0 without the ESR-induced time lag, while keeping the detection mechanism relatively simple.
4Reliability
If conventional transient improvement methods are used, then single transients are handled, but consecutive load changes (multi load step) cannot be detected leading to unwanted voltage excursions
Solution Approach 1:
The patent implements feedback by continuously monitoring the error signal after a transient correction has been applied. When a first transient is detected and corrected, the feedback mechanism keeps watching for additional transients. If a second transient occurs before the system stabilizes, the feedback loop detects it and applies appropriate corrective action, enabling the system to handle consecutive load changes (multi load step) that would otherwise cause unwanted voltage excursions.
Data Source
AI summary
A circuit for a switch mode power supply is presented. The circuit comprises a transient detection portion adapted to delay an analogue error signal (Vdiff) derived from the output voltage (Vout) of the switch mode power supply and to detect whether the difference between the output voltage and the delayed analogue error signal (Vdel) is within a predetermined range.