SMS4 Acceleration Instructions for Processor Encryption
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Implementing the SMS4 cryptographic algorithm is computationally intensive, leading to poor performance in software implementations due to the large number of operations required, especially with conventional methods needing separate instructions for each operation and 32 rounds of encryption/decryption and key expansion.
Innovation Solution
The introduction of SMS4 acceleration instructions that can evaluate all or substantially all of one round function for encryption/decryption or key expansion in a single instruction, reducing the instruction count and improving performance by simplifying the execution of the SMS4 algorithm.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional software implementation methods are used for SMS4 cryptographic algorithm, then the algorithm can be implemented with standard instructions, but the performance is poor due to the large number of operations and instructions required
Solution Approach 1:
The patent introduces dedicated SMS4 acceleration instructions that segment the cryptographic algorithm into distinct executable operations. Each instruction handles specific SMS4 functions (encryption, decryption, key expansion) independently, allowing the processor to execute these operations more efficiently than general-purpose software implementations, thereby improving productivity while managing complexity through specialized instruction design
Solution Approach 2:
The patent replaces the mechanical software implementation approach (multiple sequential instructions) with specialized hardware-accelerated instructions. The processor includes dedicated execution units that can perform SMS4 operations in fewer clock cycles, substituting the software-based mechanical execution with optimized hardware logic that reduces both instruction count and execution time
2Ease of operation
If separate instructions are used for each operation in SMS4 algorithm, then each operation can be executed independently, but the total number of instructions increases leading to poor performance
Solution Approach 1:
The patent merges multiple separate SMS4 operations into unified acceleration instructions. Instead of requiring separate instructions for each cryptographic operation, the specialized instructions combine related operations (such as substitution, permutation, and key scheduling) into single executable units, improving computational efficiency while maintaining operational clarity through well-defined instruction interfaces
Solution Approach 2:
The patent creates universal SMS4 acceleration instructions that can handle multiple cryptographic operations (encryption, decryption, key expansion) through a single instruction format. These multi-functional instructions improve productivity by reducing the total instruction count while maintaining ease of operation through a consistent instruction set architecture that handles different SMS4 operations uniformly
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A processor of an aspect includes a plurality of packed data registers and a decode unit to decode an instruction. The instruction is to indicate one or more source packed data operands. The one or more source packed data operands are to have four 32-bit results of four prior SMS4 rounds. The one or more source operands are also to have a 32-bit value. An execution unit is coupled with the decode unit and the plurality of the packed data registers. The execution unit, in response to the instruction, is to store a 32-bit result of a current SMS4 round in a destination storage location that is to be indicated by the instruction.