SMT Core Priority Controller for Thread Resource Arbitration
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Solution Overview
Problem
Modern processor cores supporting simultaneous multi-threading (SMT) often experience performance degradation due to resource competition among threads, leading to uncertainty in achieving expected performance levels, especially for threads with real-time constraints or priority requirements.
Innovation Solution
The implementation of a priority-based system within the SMT core, utilizing a priority controller and thread selector to allocate execution cycles and resources based on Class of Service (CLOS) assignments and priority maps, ensuring higher priority threads receive preferential treatment in pipeline access and resource allocation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If SMT mode is enabled to run multiple threads in parallel, then processor throughput and resource utilization are improved, but performance degradation occurs due to resource competition among threads
Solution Approach 1:
The patent implements class-of-service (CoS) based resource allocation where different threads receive different quality levels of resource access. High-priority threads get preferential access to execution ports, rename buffers, and other core resources through weighted arbitration mechanisms, while low-priority threads receive remaining resources. This local differentiation resolves the contradiction by ensuring reliable performance for critical threads while maintaining overall high throughput through parallel execution of multiple threads.
Solution Approach 2:
The system dynamically adjusts resource allocation parameters based on thread priority and workload characteristics. Execution ports are allocated with different weights to different CoS classes, and resource arbitration thresholds are modified according to real-time performance requirements. This parameter adjustment allows the system to maintain both high throughput and performance guarantees by adapting resource distribution to match actual thread needs.
2Device complexity
If resources are allocated equally among all threads, then simplicity of resource management is maintained, but performance uncertainty increases for threads with real-time constraints
Solution Approach 1:
The system performs preliminary classification of threads into different classes of service before execution begins. Thread priorities and resource allocation weights are pre-determined based on thread characteristics and real-time requirements, allowing the resource management system to operate with simple weighted arbitration rather than complex real-time decisions. This preliminary categorization resolves the contradiction by making performance predictable through pre-planned resource allocation while keeping the actual resource management mechanism relatively simple.
3Reliability
If priority-based resource allocation is implemented to ensure performance for high-priority threads, then performance reliability is improved, but device complexity increases due to additional control mechanisms
Solution Approach 1:
The patent segments core resources into multiple allocation levels based on class of service. Execution ports are divided into high-priority and low-priority groups, with separate arbitration mechanisms for each segment. Rename buffers, load/store queues, and other resources are similarly partitioned. This segmentation resolves the contradiction by implementing performance guarantees through relatively simple segment-based allocation rather than complex global resource management, reducing control overhead while maintaining reliability.
4Reliability
If execution cycles are concentrated on high-priority threads, then performance of critical threads is ensured, but overall processor utilization may decrease due to underutilization of available resources
Solution Approach 1:
The system maintains continuous useful action by ensuring that when high-priority threads are ready for execution, they immediately access allocated execution ports without idle cycles. Low-priority threads continuously fill available ports when high-priority threads are not ready, eliminating resource idle time. This continuous utilization across different priority levels resolves the contradiction by ensuring real-time constraints are met while maintaining high overall processor utilization through seamless thread switching and resource sharing.
Data Source
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AI summary
A simultaneous multi-threading (SMT) processor core capable of thread-based biasing with respect to execution resources. The SMT processor includes priority controller circuitry to determine a thread priority value for each of a plurality of threads to be executed by the SMT processor core and to generate a priority vector comprising the thread priority value of each of the plurality of threads. The SMT processor further includes thread selector circuitry to make execution cycle assignments of a pipeline by assigning to each of the plurality of threads a portion of the pipeline's execution cycles based on each thread's priority value in the priority vector. The thread selector circuitry is further to select, from the plurality of threads, tasks to be processed by the pipeline based on the execution cycle assignments.