Snapshot Clock Switching for Low-Power Precision Ranging
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Solution Overview
Problem
Ranging systems face challenges in achieving precise time measurements while minimizing power consumption, as high-resolution clocks like PLLs consume high power and reactivation delays can lead to inaccurate data.
Innovation Solution
Transitioning between a high-resolution PLL clock and a low-resolution Crystal Oscillator (XO) clock, with phase shift compensation to maintain timing precision and reduce power consumption by using the XO clock between measurements, and converting XO clock cycles to equivalent PLL cycles for accurate TDOA measurements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high-resolution PLL clock is used for time measurements, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The system dynamically switches between two clock sources (PLL and XO) based on operational requirements. The PLL clock is activated only during TDOA measurements when high precision is needed, while the XO clock operates during idle periods to reduce power consumption. This dynamic switching resolves the contradiction by adapting the clock source to the current operational state.
Solution Approach 2:
The PLL clock is activated periodically only when TDOA measurements are required, rather than continuously. The system alternates between using the high-precision PLL clock for measurements and the low-power XO clock for non-measurement periods. This periodic activation of the high-power component resolves the contradiction between precision and power consumption.
2Use of energy by moving object
If the PLL is deactivated between measurements to reduce power, then power consumption is reduced, but reactivation delays cause measurement inaccuracies
Solution Approach 1:
The XO clock serves as an intermediary time source that maintains system timing functionality when the PLL is deactivated. By using the XO clock to maintain basic timing operations and track time passage during PLL shutdown periods, the system avoids the reactivation delay problem while still achieving power reduction. The XO clock acts as a bridge that preserves timing accuracy without requiring the high-power PLL to remain active.
3Measurement precision
If the PLL remains active to avoid reactivation delays, then measurement accuracy is maintained, but power consumption increases
Solution Approach 1:
The timing functionality is segmented into two separate clock sources with different characteristics: the high-precision PLL clock and the low-power XO clock. Each clock source is activated for specific segments of operation based on requirements. This segmentation allows the system to use only the necessary clock source for each operational phase, resolving the contradiction by eliminating the need for continuous PLL operation.
Data Source
AI summary
A method for optimizing power of a ranging sequence includes counting at least one cycle of a first clock during a Crystal Oscillator (XO)-mode to generate a first cycle count. A second clock is activated at an end of the XO-mode. The first cycle count is converted into a fractional correction value by multiplying the first cycle count by a ratio of a second period of the second clock divided by a first period of the first clock. A first alignment of the first clock to the second clock is determined at a beginning of the XO-mode. A second alignment of the first clock to the second clock is determined at the end of the XO-mode. An adjusted cycle count is determined by summating the fractional correction value with a summation of the first alignment and the second alignment divided by the first period.