Smart NIC Packet Jitter Elimination via Multicore Segmentation
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Solution Overview
Problem
Data packet generation in data centers is vulnerable to packet jitter due to variations in latency, leading to inconsistent flow rates and degraded data quality, which existing technologies have not effectively addressed.
Innovation Solution
A smart network interface controller (SNIC) with a multicore processor, featuring a smart packet generator controller, daemon, and engine that executes user commands to create threads for generating data packets with consistent flow rates by distributing packet generation across multiple data cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If packet generation is performed in user space or kernel space with conventional NICs, then packet generation can be implemented, but packet jitter occurs due to variations in PCI bus speed, CPU speed, and memory latency
Solution Approach 1:
The patent divides the packet generation function across multiple independent data cores within the SNIC, with each core executing packet generation threads independently. This segmentation allows parallel packet generation without shared resource contention, eliminating jitter caused by PCI bus speed variations and memory latency. The control core coordinates the data cores but does not bottleneck the packet generation process.
Solution Approach 2:
The patent introduces a dedicated control core as an intermediary between the user-space packet generator and the data cores. This control core manages thread creation and coordination without creating a bottleneck, as it operates independently from the data cores. The intermediary structure allows clean separation of control logic from data generation, eliminating jitter associated with shared CPU execution.
2Adaptability or versatility
If packet generation is performed in user space, then protocol stack can be used, but additional latency is introduced through protocol stack processing
Solution Approach 1:
The patent segments the packet generation system into user-space protocol stack processing and data-core packet generation. The protocol stack runs in user space independently, while data cores handle only the low-latency packet assembly and transmission. This segmentation allows protocol processing without introducing latency to the critical packet generation path.
Solution Approach 2:
The control core acts as an intermediary that receives packet generation commands from the user-space protocol stack and translates them into execution instructions for data cores. This intermediary layer isolates the protocol stack from the time-critical packet generation path, allowing protocol processing to occur without blocking packet transmission.
3Speed
If packet generation is performed in kernel space, then direct NIC access is achieved, but packet jitter still occurs due to shared CPU execution
Solution Approach 1:
The patent segments CPU execution into a control core for thread management and multiple data cores for parallel packet generation. This segmentation eliminates shared CPU execution bottlenecks by distributing packet generation across independent cores, maintaining direct NIC access while eliminating jitter caused by CPU scheduling variations.
Solution Approach 2:
The patent transitions from single-CPU sequential execution to multi-core parallel execution by adding the data core dimension. This dimensional change allows simultaneous packet generation on multiple cores, increasing throughput while eliminating jitter through independent execution paths that do not share CPU time slices.
Data Source
AI summary
This disclosure is directed to processes and systems for generating data packets in a smart network interface controller (“SNIC”) of a host server computer. A smart packet generator (“spktgen”) controller receives a user command that contains directions for how packets are generated in the SNIC. The command is sent to a spktgen daemon that runs in a control core of the multicore processor. The spktgen daemon extracts the type of packet generator and packet parameters recorded in the command and sends the type of packet generator and packet parameters to a spktgen engine that also runs in the control core. The spktgen engine creates threads in each of one or more data cores of the multicore processor. Each thread comprises instructions for generating data packets from the data generated by data generating sources of the host in accordance with the type of packet generator and the packet parameters.