Snoop Filter Retention Data Management for Cache Coherence

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Solution Overview

Problem

Current data processing systems with cache memory hierarchies face challenges in efficiently managing cache entries across different levels of the hierarchy, leading to inefficiencies in retention and coherence, particularly due to the need for complex communication and storage of retention data across cache memories.

Innovation Solution

The implementation of a snoop filter with retention data storage circuitry and transfer circuitry that tracks and manages retention data within a second cache memory, allowing for controlled retention and transfer of cache entries between first and second cache memories, reducing communication overhead and improving cache coherence.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If retention data is stored in each cache memory level, then cache entry retention control is improved, but device complexity and communication overhead increase

Engineering Contradiction:
Improvecache entry retention controlVSAvoidcommunication overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the retention data storage function from the cache memory structure and places it in the snoop filter. This separates the retention control function from the cache memory itself, allowing retention data to be stored centrally in the snoop filter rather than distributed in each cache memory level, thereby reducing communication overhead while maintaining retention control capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The snoop filter acts as an intermediary component that handles retention data storage and management. By placing retention data storage circuitry in the snoop filter, the system uses this intermediate component to mediate between cache memory levels, reducing the need for direct complex communication between L1 and L2 cache memories

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If cache coherency mechanisms are enhanced, then data coherence between cache levels is improved, but processing speed decreases due to additional snoop operations

Engineering Contradiction:
Improvedata coherenceVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent implements preliminary action by having the snoop filter track and manage retention data in advance before coherence conflicts arise. The retention data is stored and processed proactively in the snoop filter, allowing the system to prepare coherence management decisions before actual cache coherence issues occur, thereby reducing the impact of snoop operations on processing speed

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11200177B2Cache retention data management
Publication Date: 2021.12.14 ARM LTD
  • US11200177B2 patent drawing
  • US11200177B2 patent drawing
  • US11200177B2 patent drawing

AI summary

A data processing system (2) incorporates a first exclusive cache memory (8, 10) and a second exclusive cache memory (14). A snoop filter (18) located together with the second exclusive cache memory on one side of the communication interface (12) serves to track entries within the first exclusive cache memory. The snoop filter includes retention data storage circuitry to store retention data for controlling retention of cache entries within the second exclusive cache memory. Retention data transfer circuitry (20) serves to transfer the retention data to and from the retention data storage circuitry within the snoop filter and the second cache memory as the cache entries concerned are transferred between the second exclusive cache memory and the first exclusive cache memory.