Selective Snoop Request Invalidation for Cache Coherency
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Solution Overview
Problem
In multi-processor data processing systems, the processing of pending snoop requests can significantly delay the system's transition to low power modes or other operations, as all requests must be completed before caches can be disabled, leading to inefficiencies and power consumption issues.
Innovation Solution
A cache coherency manager with a 'handshake' mechanism that allows processors to selectively invalidate pending snoop requests based on a snoop queue invalidate bit, enabling either completion or invalidation of requests before cache disabling, thereby reducing processing time and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all pending snoop requests are processed before cache disabling, then cache coherency is maintained, but system transition time increases significantly
Solution Approach 1:
The patent applies partial action by selectively processing only certain snoop requests before cache disabling rather than completing all pending requests. The cache coherency manager identifies and processes only those snoop requests that are critical for maintaining coherency, while allowing non-critical requests to be dropped or deferred, thus reducing transition time while maintaining necessary coherency guarantees
Solution Approach 2:
The patent changes the parameter of snoop request handling from binary (complete all or none) to selective (process some, drop others). This is achieved by introducing priority levels or completion status parameters that allow the system to differentiate between snoop requests that must be completed versus those that can be dropped, enabling flexible control over the trade-off between coherency and transition speed
2Reliability
If all pending snoop requests are processed before cache disabling, then cache coherency is maintained, but power consumption increases
Solution Approach 1:
The patent reduces power consumption by performing partial processing of snoop requests only when necessary for coherency maintenance. By identifying and processing only the essential subset of requests rather than all pending requests, the system minimizes the energy expended during cache disabling operations while still ensuring coherency where required
Solution Approach 2:
The patent introduces parameters that control the depth and scope of snoop request processing, allowing the system to adjust energy consumption based on coherency requirements. By changing the processing parameter from 'all requests' to 'selected requests based on priority/coherency impact', the system achieves energy efficiency without sacrificing necessary coherency
3Productivity
If snoop requests are invalidated selectively, then system performance improves, but cache coherency management complexity increases
Solution Approach 1:
The patent introduces a cache coherency manager as an intermediary component that handles the complexity of selective snoop request invalidation. This mediator component sits between the cache system and the snoop request queue, automatically making decisions about which requests to process or drop based on predefined coherency policies, thus improving performance while containing complexity within a dedicated management module
Solution Approach 2:
The patent segments the snoop request processing function into distinct components: identification of critical requests, processing of critical requests, and dropping of non-critical requests. This segmentation allows each component to be optimized independently and simplifies the overall control logic by breaking down the complex decision-making process into manageable, modular steps
Data Source
AI summary
A data processing system includes a system interconnect, a processor coupled to the system interconnect, and a cache coherency manager (CCM) coupled to the system interconnect. The processor includes a cache. A method includes generating, by the CCM, one or more snoop requests to the cache of the processor; storing the one or more snoop requests to the cache of the processor into a snoop queue; setting a cache enable indicator to indicate that the cache of the processor is to be disabled; in response to setting the cache enable indicator to indicate that the cache of the processor is to be disabled, selectively invalidating the one or more snoop requests to the cache of the processor, wherein the selectively invalidating is performed based on an invalidate snoop queue indicator of the processor; and disabling the cache.