SNOW 3G Vector Instructions for Wireless Security
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Solution Overview
Problem
The SNOW 3G wireless security algorithm is computationally complex and time-consuming, requiring significant resources and energy due to its software implementations, which are inefficient for high-speed and energy-constrained mobile devices.
Innovation Solution
New processor instructions, such as SNOW_FSMZ, SNOW_LFSRV, and SNOW_LFSR1, are introduced to perform efficient vectorized computations for the SNOW 3G algorithm, utilizing SIMD operations and vector registers to reduce computational cycles and memory access, enabling faster and more energy-efficient key-stream generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If software implementation is used for SNOW 3G algorithm, then implementation flexibility is maintained, but execution speed and energy efficiency deteriorate
Solution Approach 1:
The SNOW 3G algorithm is segmented into distinct functional components (FSM state updates, LFSR updates, key stream generation), each handled by dedicated instructions (SNOW_FSMZ, SNOW_LFSRV, SNOW_LFSR1). This segmentation allows optimized execution of each component while maintaining overall algorithm functionality.
Solution Approach 2:
Vector registers serve as intermediaries between the instruction set and the algorithm operations. The instructions operate on vector registers containing multiple data elements, enabling parallel processing of algorithm components and achieving 3-cycle throughput for 32-bit dword operations.
2Use of energy by moving object
If software implementation is used for SNOW 3G algorithm, then portability is maintained, but energy consumption increases
Solution Approach 1:
Multiple algorithm operations are merged into single instructions. For example, FSM state updates and LFSR updates are combined in the SNOW_FSMZ and SNOW_LFSRV instructions respectively, reducing the total number of instruction executions and memory accesses required, thereby lowering energy consumption while maintaining throughput.
Solution Approach 2:
The instructions are designed to operate continuously on vector registers without requiring frequent memory accesses or instruction fetches. The 3-cycle throughput enables continuous key-stream generation, maintaining high productivity while reducing energy consumption compared to software implementations that require frequent context switches and memory operations.
3Productivity
If traditional software instructions are used, then instruction set compatibility is maintained, but computational efficiency deteriorates
Solution Approach 1:
The new instructions (SNOW_FSMZ, SNOW_LFSRV, SNOW_LFSR1) are designed to work within existing processor architectures while providing specialized functionality for SNOW 3G operations. The instructions utilize standard vector register operations and can be integrated with existing instruction sets, achieving high computational efficiency without requiring entirely new processor architectures.
Data Source
AI summary
Vector instructions for performing SNOW 3G wireless security operations are received and executed by the execution circuitry of a processor. The execution circuitry receives a first operand of the first instruction specifying a first vector register that stores a current state of a finite state machine (FSM). The execution circuitry also receives a second operand of the first instruction specifying a second vector register that stores data elements of a liner feedback shift register (LFSR) that are needed for updating the FSM. The execution circuitry executes the first instruction to produce a updated state of the FSM and an output of the FSM in a destination operand of the first instruction.