SO-SO Logic Cell Layout for Low-Energy Spin-Orbit Computing

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Solution Overview

Problem

Current magneto-electric spin orbital (MESO) structures face challenges in manufacturing complexity, improper biasing, and large variation in switching threshold voltage, leading to inefficiencies and increased area consumption in integrated circuits.

Innovation Solution

The integration of spin orbital-spin orbital (SO-SO) logic using a ferromagnetic layer for encoding logic states, with both input and output based on spin orbital mechanisms, featuring a first and second spin orbit torque layer and interconnects between adjacent devices, allowing for in-plane and perpendicular current paths to optimize logic operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If MESO structures are used for logic operations, then energy efficiency is improved, but manufacturing complexity and biasing difficulty increase

Engineering Contradiction:

Improveenergy efficiencyVSAvoidmanufacturing complexity

Core Design Contradiction:

Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent merges the input and output stages into a single integrated structure, where the magnetoelectric element serves both as the input interface and the output interface. This eliminates the need for separate conversion stages and reduces manufacturing complexity while maintaining the energy efficiency benefits of MESO structures.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The magnetoelectric element is designed to perform multiple functions: it converts charge to spin for input operations and converts spin to charge for output operations. This multi-functionality reduces the overall device complexity and simplifies the manufacturing process while preserving the low energy consumption characteristics.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Use of energy by moving object

If MESO structures are used for logic operations, then energy efficiency is improved, but device area increases

Engineering Contradiction:

Improveenergy efficiencyVSAvoiddevice area

Core Design Contradiction:

Use of energy by moving objectVSArea of stationary object

Solution Approach 1:

By merging the input and output stages into a single integrated structure, the patent significantly reduces the device area. The unified design eliminates the need for separate conversion stages and interconnects, allowing for higher integration density while maintaining the energy efficiency advantages of MESO structures.

Inventive Principle:

Principle #5Merging (Combining)

3Ease of operation

If multiferroic material is used for input stage, then charge-to-spin conversion is achieved, but switching threshold voltage variation increases

Engineering Contradiction:

Improvecharge-to-spin conversionVSAvoidswitching threshold voltage variation

Core Design Contradiction:

Ease of operationVSManufacturing precision

Solution Approach 1:

The patent modifies the material composition and structural parameters of the magnetoelectric element to achieve a more uniform switching threshold voltage. By carefully controlling the thickness, composition, and interface quality of the multiferroic layer, the patent reduces the variation in switching voltage across different devices while maintaining effective charge-to-spin conversion.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies biasing, reduces energy consumption, and increases integration density by using the same spin-orbit coupling mechanism for both input and output, achieving higher current density and lower energy requirements compared to conventional CMOS transistors.

Implementation Method 1

both the input and output based on spin orbital mechanisms

Methodology Applied

Scientific EffectSpin-orbit coupling:

Implementation Method 2

a first spin orbit torque (SOT1) layer, a second spin orbit torque (SOT2) layer

Methodology Applied

Scientific EffectSpin orbit torque:

Implementation Method 3

a ferromagnetic layer disposed between the SOT1 and SOT2 layer

Methodology Applied

Scientific EffectFerromagnetism: Ferromagnetism

Data Source

PatentUS20240423098A1Spin Orbital Squared (SO-SO) Logic

Publication Date: 2024.12.19 WESTERN DIGITAL TECHNOLOGIES INC

AI summary

The present disclosure generally relate to an integrated circuit utilizing spin orbital-spin orbital (SO-SO) logic. The integrated circuit comprises a plurality of SO-SO logic cells, where each SO-SO logic cell comprises a first spin orbit torque (SOT1) layer, a second spin orbit torque (SOT2) layer, and a ferromagnetic layer disposed between the SOT1 and SOT2 layer. Each SO-SO logic cell is configured for: a first current path that is in plane to a plane of the SOT1 layer, and a second current path that is perpendicular to a plane of the SOT2 layer, the second current path being configured to extend into the ferromagnetic layer. The integrated circuit further comprises a common voltage source connected to each SOT device, and one or more interconnects disposed between adjacent SOT devices of the plurality of SOT devices, the one or more interconnects connecting the adjacent SOT devices together.